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author | Evan Cheng <evan.cheng@apple.com> | 2007-09-25 01:57:46 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-09-25 01:57:46 +0000 |
commit | 0488db9b99fcfca407e859ef5cccf40dea23de16 (patch) | |
tree | 19d2a6124364f9e5bbc91ed3f9c26d44419ccb1c /lib/Target/X86/X86InstrFPStack.td | |
parent | a6fb1b6743ee1411accf2d6e636f73f2ee0a7f5b (diff) | |
download | external_llvm-0488db9b99fcfca407e859ef5cccf40dea23de16.zip external_llvm-0488db9b99fcfca407e859ef5cccf40dea23de16.tar.gz external_llvm-0488db9b99fcfca407e859ef5cccf40dea23de16.tar.bz2 |
Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
all the kinks are worked out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrFPStack.td')
-rw-r--r-- | lib/Target/X86/X86InstrFPStack.td | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrFPStack.td b/lib/Target/X86/X86InstrFPStack.td index 1e8cf6a..737c745 100644 --- a/lib/Target/X86/X86InstrFPStack.td +++ b/lib/Target/X86/X86InstrFPStack.td @@ -320,6 +320,31 @@ defm CMOVNE : FPCMov<X86_COND_NE>; defm CMOVNP : FPCMov<X86_COND_NP>; } +multiclass NEW_FPCMov<PatLeaf cc> { + def _Fp32 : FpIf32<(outs RFP32:$dst), (ins RFP32:$src1, RFP32:$src2), + CondMovFP, + [(set RFP32:$dst, (X86cmov_new RFP32:$src1, RFP32:$src2, + cc, EFLAGS))]>; + def _Fp64 : FpIf64<(outs RFP64:$dst), (ins RFP64:$src1, RFP64:$src2), + CondMovFP, + [(set RFP64:$dst, (X86cmov_new RFP64:$src1, RFP64:$src2, + cc, EFLAGS))]>; + def _Fp80 : FpI_<(outs RFP80:$dst), (ins RFP80:$src1, RFP80:$src2), + CondMovFP, + [(set RFP80:$dst, (X86cmov_new RFP80:$src1, RFP80:$src2, + cc, EFLAGS))]>; +} +let Uses = [EFLAGS], isTwoAddress = 1 in { +defm NEW_CMOVB : NEW_FPCMov<X86_COND_B>; +defm NEW_CMOVBE : NEW_FPCMov<X86_COND_BE>; +defm NEW_CMOVE : NEW_FPCMov<X86_COND_E>; +defm NEW_CMOVP : NEW_FPCMov<X86_COND_P>; +defm NEW_CMOVNB : NEW_FPCMov<X86_COND_AE>; +defm NEW_CMOVNBE: NEW_FPCMov<X86_COND_A>; +defm NEW_CMOVNE : NEW_FPCMov<X86_COND_NE>; +defm NEW_CMOVNP : NEW_FPCMov<X86_COND_NP>; +} + // These are not factored because there's no clean way to pass DA/DB. def CMOVB_F : FPI<0xC0, AddRegFrm, (outs RST:$op), (ins), "fcmovb\t{$op, %st(0)|%ST(0), $op}">, DA; |