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author | Michael Liao <michael.liao@intel.com> | 2013-04-11 04:52:28 +0000 |
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committer | Michael Liao <michael.liao@intel.com> | 2013-04-11 04:52:28 +0000 |
commit | 02d2e612521954b5ff7c1ba6fd53e36bc51e1c48 (patch) | |
tree | af6fc7afc6bc91ff6926a48e7819b9538dc1bf68 /lib/Target/X86/X86InstrFormats.td | |
parent | 959ddbb5e0e088f4d5c3f8c015de3caf0baa6e6c (diff) | |
download | external_llvm-02d2e612521954b5ff7c1ba6fd53e36bc51e1c48.zip external_llvm-02d2e612521954b5ff7c1ba6fd53e36bc51e1c48.tar.gz external_llvm-02d2e612521954b5ff7c1ba6fd53e36bc51e1c48.tar.bz2 |
Add CLAC/STAC instruction encoding/decoding support
As these two instructions in AVX extension are privileged instructions for
special purpose, it's only expected to be used in inlined assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrFormats.td')
-rw-r--r-- | lib/Target/X86/X86InstrFormats.td | 36 |
1 files changed, 19 insertions, 17 deletions
diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index 0ef9491..a71e024 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -35,25 +35,27 @@ def MRM_C3 : Format<35>; def MRM_C4 : Format<36>; def MRM_C8 : Format<37>; def MRM_C9 : Format<38>; -def MRM_E8 : Format<39>; -def MRM_F0 : Format<40>; -def MRM_F8 : Format<41>; -def MRM_F9 : Format<42>; +def MRM_CA : Format<39>; +def MRM_CB : Format<40>; +def MRM_E8 : Format<41>; +def MRM_F0 : Format<42>; def RawFrmImm8 : Format<43>; def RawFrmImm16 : Format<44>; -def MRM_D0 : Format<45>; -def MRM_D1 : Format<46>; -def MRM_D4 : Format<47>; -def MRM_D5 : Format<48>; -def MRM_D6 : Format<49>; -def MRM_D8 : Format<50>; -def MRM_D9 : Format<51>; -def MRM_DA : Format<52>; -def MRM_DB : Format<53>; -def MRM_DC : Format<54>; -def MRM_DD : Format<55>; -def MRM_DE : Format<56>; -def MRM_DF : Format<57>; +def MRM_F8 : Format<45>; +def MRM_F9 : Format<46>; +def MRM_D0 : Format<47>; +def MRM_D1 : Format<48>; +def MRM_D4 : Format<49>; +def MRM_D5 : Format<50>; +def MRM_D6 : Format<51>; +def MRM_D8 : Format<52>; +def MRM_D9 : Format<53>; +def MRM_DA : Format<54>; +def MRM_DB : Format<55>; +def MRM_DC : Format<56>; +def MRM_DD : Format<57>; +def MRM_DE : Format<58>; +def MRM_DF : Format<59>; // ImmType - This specifies the immediate type used by an instruction. This is // part of the ad-hoc solution used to emit machine instruction encodings by our |