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| author | Eric Christopher <echristo@apple.com> | 2010-04-02 21:54:27 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2010-04-02 21:54:27 +0000 |
| commit | 6d1cd1cd04abb1828a14980e15252985c8c728b2 (patch) | |
| tree | 9271866e5c250c6e85620db7dc1921b2bf9ec7c2 /lib/Target/X86/X86InstrFormats.td | |
| parent | 7249ef04557cc6f9af7b6df93728683be3b65048 (diff) | |
| download | external_llvm-6d1cd1cd04abb1828a14980e15252985c8c728b2.zip external_llvm-6d1cd1cd04abb1828a14980e15252985c8c728b2.tar.gz external_llvm-6d1cd1cd04abb1828a14980e15252985c8c728b2.tar.bz2 | |
Separate out the AES-NI instructions from the SSE4.2 instructions. Add
a new subtarget option for AES and check for the support. Add "westmere"
line of processors and add AES-NI support to the core i7.
Add a couple of TODOs for information I couldn't verify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100231 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrFormats.td')
| -rw-r--r-- | lib/Target/X86/X86InstrFormats.td | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index d25ec26..cbe4c82 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -311,6 +311,21 @@ class SS42AI<bits<8> o, Format F, dag outs, dag ins, string asm, : Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA, Requires<[HasSSE42]>; +// AES Instruction Templates: +// +// AES8I +// FIXME: Verify these, they appear to use the same encoding as the SSE4.2 T8 +// and TA encodings. +class AES8I<bits<8> o, Format F, dag outs, dag ins, string asm, + list<dag>pattern> + : I<o, F, outs, ins, asm, pattern, SSEPackedInt>, T8, + Requires<[HasAES]>; + +class AESAI<bits<8> o, Format F, dag outs, dag ins, string asm, + list<dag> pattern> + : Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA, + Requires<[HasAES]>; + // X86-64 Instruction templates... // |