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author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-05-21 12:04:22 +0000 |
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committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-05-21 12:04:22 +0000 |
commit | f8cd1ee516c845285fd6a7ee27abb5339c5f3fba (patch) | |
tree | 42f2da59058dd2d6525de07c26302ff1643714a8 /lib/Target/X86/X86InstrFormats.td | |
parent | e3658a26b5381e09e96563db27bb51f4fe067db8 (diff) | |
download | external_llvm-f8cd1ee516c845285fd6a7ee27abb5339c5f3fba.zip external_llvm-f8cd1ee516c845285fd6a7ee27abb5339c5f3fba.tar.gz external_llvm-f8cd1ee516c845285fd6a7ee27abb5339c5f3fba.tar.bz2 |
Removed SSEPacked domain from all forms (AVX, SSE, signed, unsigned) scalar compare instructions, like COMISS, COMISD.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182371 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrFormats.td')
-rw-r--r-- | lib/Target/X86/X86InstrFormats.td | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index a71e024..8b98a7b 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -292,13 +292,18 @@ class Iseg32 <bits<8> o, Format f, dag outs, dag ins, string asm, } def __xs : XS; +def __xd : XD; // SI - SSE 1 & 2 scalar instructions class SI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern, InstrItinClass itin = NoItinerary> : I<o, F, outs, ins, asm, pattern, itin> { let Predicates = !if(hasVEXPrefix /* VEX */, [HasAVX], - !if(!eq(Prefix, __xs.Prefix), [UseSSE1], [UseSSE2])); + // !if(!eq(Prefix, __xs.Prefix), [UseSSE1], [UseSSE2])); + // !if(hasOpSizePrefix, [UseSSE2], [UseSSE1]))); + !if(!eq(Prefix, __xs.Prefix), [UseSSE1], + !if(!eq(Prefix, __xd.Prefix), [UseSSE2], + !if(hasOpSizePrefix, [UseSSE2], [UseSSE1])))); // AVX instructions have a 'v' prefix in the mnemonic let AsmString = !if(hasVEXPrefix, !strconcat("v", asm), asm); |