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author | Owen Anderson <resistor@mac.com> | 2008-08-14 22:49:33 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2008-08-14 22:49:33 +0000 |
commit | 44eb65cf58e3ab9b5621ce72256d1621a18aeed7 (patch) | |
tree | 9fe25d09a3e9dc78ce841877df11118ad71cfbce /lib/Target/X86/X86InstrInfo.cpp | |
parent | c0573b13a119e1e504225542bddd85db7d4bd29f (diff) | |
download | external_llvm-44eb65cf58e3ab9b5621ce72256d1621a18aeed7.zip external_llvm-44eb65cf58e3ab9b5621ce72256d1621a18aeed7.tar.gz external_llvm-44eb65cf58e3ab9b5621ce72256d1621a18aeed7.tar.bz2 |
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.cpp')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index d800c97..6d5f143 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -1456,7 +1456,7 @@ static bool isBrAnalysisUnpredicatedTerminator(const MachineInstr *MI, bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - std::vector<MachineOperand> &Cond) const { + SmallVectorImpl<MachineOperand> &Cond) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isBrAnalysisUnpredicatedTerminator(--I, *this)) @@ -1567,7 +1567,7 @@ static const MachineInstrBuilder &X86InstrAddOperand(MachineInstrBuilder &MIB, unsigned X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, - const std::vector<MachineOperand> &Cond) const { + const SmallVectorImpl<MachineOperand> &Cond) const { // Shouldn't be a fall through. assert(TBB && "InsertBranch must not be told to insert a fallthrough"); assert((Cond.size() == 1 || Cond.size() == 0) && @@ -2365,7 +2365,7 @@ bool X86InstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const { } bool X86InstrInfo:: -ReverseBranchCondition(std::vector<MachineOperand> &Cond) const { +ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { assert(Cond.size() == 1 && "Invalid X86 branch condition!"); Cond[0].setImm(GetOppositeBranchCondition((X86::CondCode)Cond[0].getImm())); return false; |