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| author | Craig Topper <craig.topper@gmail.com> | 2012-01-25 05:37:32 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-01-25 05:37:32 +0000 |
| commit | 4bb3f34b2296f0ec70751f332cf7ef96d2d30a48 (patch) | |
| tree | e2f59b1ce9afae25fd2a49626d5e73789840358a /lib/Target/X86/X86InstrInfo.cpp | |
| parent | 3c2c954e0baf4c5029f87277d75cc6ca38916f71 (diff) | |
| download | external_llvm-4bb3f34b2296f0ec70751f332cf7ef96d2d30a48.zip external_llvm-4bb3f34b2296f0ec70751f332cf7ef96d2d30a48.tar.gz external_llvm-4bb3f34b2296f0ec70751f332cf7ef96d2d30a48.tar.bz2 | |
Custom lower phadd and phsub intrinsics to target specific nodes. Remove the patterns that are no longer necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148927 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.cpp')
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 86a2e2f..4b6e26b 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -719,12 +719,12 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::PCMPGTDrr, X86::PCMPGTDrm, TB_ALIGN_16 }, { X86::PCMPGTQrr, X86::PCMPGTQrm, TB_ALIGN_16 }, { X86::PCMPGTWrr, X86::PCMPGTWrm, TB_ALIGN_16 }, - { X86::PHADDDrr128, X86::PHADDDrm128, TB_ALIGN_16 }, - { X86::PHADDWrr128, X86::PHADDWrm128, TB_ALIGN_16 }, + { X86::PHADDDrr, X86::PHADDDrm, TB_ALIGN_16 }, + { X86::PHADDWrr, X86::PHADDWrm, TB_ALIGN_16 }, { X86::PHADDSWrr128, X86::PHADDSWrm128, TB_ALIGN_16 }, - { X86::PHSUBDrr128, X86::PHSUBDrm128, TB_ALIGN_16 }, + { X86::PHSUBDrr, X86::PHSUBDrm, TB_ALIGN_16 }, { X86::PHSUBSWrr128, X86::PHSUBSWrm128, TB_ALIGN_16 }, - { X86::PHSUBWrr128, X86::PHSUBWrm128, TB_ALIGN_16 }, + { X86::PHSUBWrr, X86::PHSUBWrm, TB_ALIGN_16 }, { X86::PINSRWrri, X86::PINSRWrmi, TB_ALIGN_16 }, { X86::PMADDUBSWrr128, X86::PMADDUBSWrm128, TB_ALIGN_16 }, { X86::PMADDWDrr, X86::PMADDWDrm, TB_ALIGN_16 }, @@ -903,12 +903,12 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::VPCMPGTDrr, X86::VPCMPGTDrm, TB_ALIGN_16 }, { X86::VPCMPGTQrr, X86::VPCMPGTQrm, TB_ALIGN_16 }, { X86::VPCMPGTWrr, X86::VPCMPGTWrm, TB_ALIGN_16 }, - { X86::VPHADDDrr128, X86::VPHADDDrm128, TB_ALIGN_16 }, + { X86::VPHADDDrr, X86::VPHADDDrm, TB_ALIGN_16 }, { X86::VPHADDSWrr128, X86::VPHADDSWrm128, TB_ALIGN_16 }, - { X86::VPHADDWrr128, X86::VPHADDWrm128, TB_ALIGN_16 }, - { X86::VPHSUBDrr128, X86::VPHSUBDrm128, TB_ALIGN_16 }, + { X86::VPHADDWrr, X86::VPHADDWrm, TB_ALIGN_16 }, + { X86::VPHSUBDrr, X86::VPHSUBDrm, TB_ALIGN_16 }, { X86::VPHSUBSWrr128, X86::VPHSUBSWrm128, TB_ALIGN_16 }, - { X86::VPHSUBWrr128, X86::VPHSUBWrm128, TB_ALIGN_16 }, + { X86::VPHSUBWrr, X86::VPHSUBWrm, TB_ALIGN_16 }, { X86::VPERMILPDrr, X86::VPERMILPDrm, TB_ALIGN_16 }, { X86::VPERMILPSrr, X86::VPERMILPSrm, TB_ALIGN_16 }, { X86::VPINSRWrri, X86::VPINSRWrmi, TB_ALIGN_16 }, @@ -1047,12 +1047,12 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::VPERMPDYrr, X86::VPERMPDYrm, TB_ALIGN_32 }, { X86::VPERMPSYrr, X86::VPERMPSYrm, TB_ALIGN_32 }, { X86::VPERMQYrr, X86::VPERMQYrm, TB_ALIGN_32 }, - { X86::VPHADDDrr256, X86::VPHADDDrm256, TB_ALIGN_32 }, + { X86::VPHADDDYrr, X86::VPHADDDYrm, TB_ALIGN_32 }, { X86::VPHADDSWrr256, X86::VPHADDSWrm256, TB_ALIGN_32 }, - { X86::VPHADDWrr256, X86::VPHADDWrm256, TB_ALIGN_32 }, - { X86::VPHSUBDrr256, X86::VPHSUBDrm256, TB_ALIGN_32 }, + { X86::VPHADDWYrr, X86::VPHADDWYrm, TB_ALIGN_32 }, + { X86::VPHSUBDYrr, X86::VPHSUBDYrm, TB_ALIGN_32 }, { X86::VPHSUBSWrr256, X86::VPHSUBSWrm256, TB_ALIGN_32 }, - { X86::VPHSUBWrr256, X86::VPHSUBWrm256, TB_ALIGN_32 }, + { X86::VPHSUBWYrr, X86::VPHSUBWYrm, TB_ALIGN_32 }, { X86::VPMADDUBSWrr256, X86::VPMADDUBSWrm256, TB_ALIGN_32 }, { X86::VPMADDWDYrr, X86::VPMADDWDYrm, TB_ALIGN_32 }, { X86::VPMAXSWYrr, X86::VPMAXSWYrm, TB_ALIGN_32 }, |