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authorElena Demikhovsky <elena.demikhovsky@intel.com>2013-10-02 12:20:42 +0000
committerElena Demikhovsky <elena.demikhovsky@intel.com>2013-10-02 12:20:42 +0000
commitc699417f11dce6d81f630d5b1c82e00dba852b37 (patch)
tree6ae185deadc44aef95cb8b1106c7f9157ea5bcfd /lib/Target/X86/X86InstrInfo.cpp
parent0d1785a2e64648584d8230172125d171d5f1ca02 (diff)
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AVX-512: fixed a bug in getLoadStoreRegOpcode() for AVX-512 target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191818 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.cpp')
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp9
1 files changed, 3 insertions, 6 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 80d681a..6216627 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -3104,14 +3104,11 @@ static unsigned getLoadStoreRegOpcode(unsigned Reg,
if (X86::VK8RegClass.hasSubClassEq(RC) ||
X86::VK16RegClass.hasSubClassEq(RC))
return load ? X86::KMOVWkm : X86::KMOVWmk;
-
- if (X86::FR32XRegClass.hasSubClassEq(RC))
+ if (RC->getSize() == 4 && X86::FR32XRegClass.hasSubClassEq(RC))
return load ? X86::VMOVSSZrm : X86::VMOVSSZmr;
- if (X86::FR64XRegClass.hasSubClassEq(RC))
+ if (RC->getSize() == 8 && X86::FR64XRegClass.hasSubClassEq(RC))
return load ? X86::VMOVSDZrm : X86::VMOVSDZmr;
- if (X86::VR128XRegClass.hasSubClassEq(RC) ||
- X86::VR256XRegClass.hasSubClassEq(RC) ||
- X86::VR512RegClass.hasSubClassEq(RC))
+ if (X86::VR512RegClass.hasSubClassEq(RC))
return load ? X86::VMOVUPSZrm : X86::VMOVUPSZmr;
}