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author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-11-14 11:29:27 +0000 |
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committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-11-14 11:29:27 +0000 |
commit | f58e4144054b85e855c57c86eb058a6bb1907552 (patch) | |
tree | f294045cfb4fbfd7de30200ef29eb3203ea5decd /lib/Target/X86/X86InstrInfo.cpp | |
parent | 4701c4702e2f37d7a9f3ea9ef91ec47d73515093 (diff) | |
download | external_llvm-f58e4144054b85e855c57c86eb058a6bb1907552.zip external_llvm-f58e4144054b85e855c57c86eb058a6bb1907552.tar.gz external_llvm-f58e4144054b85e855c57c86eb058a6bb1907552.tar.bz2 |
AVX-512: Handled extractelement from mask vector;
Added VMOSHDUP/VMOVSLDUP shuffle instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194691 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.cpp')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 2351cff..0a668a8 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -3165,7 +3165,8 @@ static unsigned getLoadStoreRegOpcode(unsigned Reg, assert(X86::RFP80RegClass.hasSubClassEq(RC) && "Unknown 10-byte regclass"); return load ? X86::LD_Fp80m : X86::ST_FpP80m; case 16: { - assert(X86::VR128RegClass.hasSubClassEq(RC) && "Unknown 16-byte regclass"); + assert((X86::VR128RegClass.hasSubClassEq(RC) || + X86::VR128XRegClass.hasSubClassEq(RC))&& "Unknown 16-byte regclass"); // If stack is realigned we can use aligned stores. if (isStackAligned) return load ? @@ -3177,7 +3178,8 @@ static unsigned getLoadStoreRegOpcode(unsigned Reg, (HasAVX ? X86::VMOVUPSmr : X86::MOVUPSmr); } case 32: - assert(X86::VR256RegClass.hasSubClassEq(RC) && "Unknown 32-byte regclass"); + assert((X86::VR256RegClass.hasSubClassEq(RC) || + X86::VR256XRegClass.hasSubClassEq(RC)) && "Unknown 32-byte regclass"); // If stack is realigned we can use aligned stores. if (isStackAligned) return load ? X86::VMOVAPSYrm : X86::VMOVAPSYmr; |