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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-19 00:55:07 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-19 00:55:07 +0000 |
| commit | 11e8b74a7ae9ecd59b64180a59143e39bc3b9514 (patch) | |
| tree | 23c9e8ebbd1f15df2c90829c4bf6669a0aa0940b /lib/Target/X86/X86InstrInfo.h | |
| parent | b5a2d3f8e3b40c3076d03c5db7c4f0387e58b53b (diff) | |
| download | external_llvm-11e8b74a7ae9ecd59b64180a59143e39bc3b9514.zip external_llvm-11e8b74a7ae9ecd59b64180a59143e39bc3b9514.tar.gz external_llvm-11e8b74a7ae9ecd59b64180a59143e39bc3b9514.tar.bz2 | |
- Add a hook for target to determine whether an instruction def is
"long latency" enough to hoist even if it may increase spilling. Reloading
a value from spill slot is often cheaper than performing an expensive
computation in the loop. For X86, that means machine LICM will hoist
SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
instructions.
- Enable register pressure aware machine LICM by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116781 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.h')
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index e43cfac..5060ad8 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -864,6 +864,11 @@ public: unsigned OpNum, const SmallVectorImpl<MachineOperand> &MOs, unsigned Size, unsigned Alignment) const; + + bool hasHighOperandLatency(const InstrItineraryData *ItinData, + const MachineRegisterInfo *MRI, + const MachineInstr *DefMI, unsigned DefIdx, + const MachineInstr *UseMI, unsigned UseIdx) const; private: MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc, |