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author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-07-01 01:20:06 +0000 |
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committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-07-01 01:20:06 +0000 |
commit | 6596a6207627ed59f568883924a21e642934c083 (patch) | |
tree | cb40352d745211c3eb2676194aea63065b64e546 /lib/Target/X86/X86InstrInfo.h | |
parent | 2e5238ffa0becb2d673bd993e59747ec5087bf80 (diff) | |
download | external_llvm-6596a6207627ed59f568883924a21e642934c083.zip external_llvm-6596a6207627ed59f568883924a21e642934c083.tar.gz external_llvm-6596a6207627ed59f568883924a21e642934c083.tar.bz2 |
- Add AVX SSE2 Move doubleword and quadword instructions.
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
in the .td file now have a AVX encoded form already working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107365 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.h')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index d131570..daf980e 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -429,9 +429,9 @@ namespace X86II { // address instructions in SSE are represented as 3 address ones in AVX // and the additional register is encoded in VEX_VVVV prefix. // - VEXShift = 0, - VEX = 1 << VEXShift, - VEX_4V = 2 << VEXShift + VEX = 1, + VEX_W = 1 << 1, + VEX_4V = 1 << 2 }; // getBaseOpcodeFor - This function returns the "base" X86 opcode for the |