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author | Chris Lattner <sabre@nondot.org> | 2010-11-06 07:34:58 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-11-06 07:34:58 +0000 |
commit | 02ff6ba6f6bb804d01ff5354176486355b5e2676 (patch) | |
tree | 60f2e7db1320a52a3edc57d036d0ca9c2bf25059 /lib/Target/X86/X86InstrInfo.td | |
parent | 414098571b19fc248fda2be194082cfd012d2729 (diff) | |
download | external_llvm-02ff6ba6f6bb804d01ff5354176486355b5e2676.zip external_llvm-02ff6ba6f6bb804d01ff5354176486355b5e2676.tar.gz external_llvm-02ff6ba6f6bb804d01ff5354176486355b5e2676.tar.bz2 |
move the "movsd -> movsl" alias to the .td files,
tidy up the movsx and movzx aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118331 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.td')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 47 |
1 files changed, 17 insertions, 30 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index fdb17a1..fd94d22 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -1370,6 +1370,10 @@ defm : IntegerCondCodeMnemonicAlias<"cmov", "q">; // Assembler Instruction Aliases //===----------------------------------------------------------------------===// +// movsd with no operands (as opposed to the SSE scalar move of a double) is an +// alias for movsl. (as in rep; movsd) +def : InstAlias<"movsd", (MOVSD)>; + // clr aliases. def : InstAlias<"clrb $reg", (XOR8rr GR8 :$reg, GR8 :$reg)>; def : InstAlias<"clrw $reg", (XOR16rr GR16:$reg, GR16:$reg)>; @@ -1377,38 +1381,21 @@ def : InstAlias<"clrl $reg", (XOR32rr GR32:$reg, GR32:$reg)>; def : InstAlias<"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)>; // movsx aliases -def : InstAlias<"movsx $src, $dst", - (MOVSX16rr8W GR16:$dst, GR8:$src)>; -def : InstAlias<"movsx $src, $dst", - (MOVSX16rm8W GR16:$dst, i8mem:$src)>; - -def : InstAlias<"movsx $src, $dst", - (MOVSX32rr8 GR32:$dst, GR8:$src)>; -def : InstAlias<"movsx $src, $dst", - (MOVSX32rr16 GR32:$dst, GR16:$src)>; - -def : InstAlias<"movsx $src, $dst", - (MOVSX64rr8 GR64:$dst, GR8:$src)>; -def : InstAlias<"movsx $src, $dst", - (MOVSX64rr16 GR64:$dst, GR16:$src)>; -def : InstAlias<"movsx $src, $dst", - (MOVSX64rr32 GR64:$dst, GR32:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX16rm8W GR16:$dst, i8mem:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX32rr8 GR32:$dst, GR8:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX32rr16 GR32:$dst, GR16:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX64rr8 GR64:$dst, GR8:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX64rr16 GR64:$dst, GR16:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX64rr32 GR64:$dst, GR32:$src)>; // movzx aliases -def : InstAlias<"movzx $src, $dst", - (MOVZX16rr8W GR16:$dst, GR8:$src)>; -def : InstAlias<"movzx $src, $dst", - (MOVZX16rm8W GR16:$dst, i8mem:$src)>; - -def : InstAlias<"movzx $src, $dst", - (MOVZX32rr8 GR32:$dst, GR8:$src)>; -def : InstAlias<"movzx $src, $dst", - (MOVZX32rr16 GR32:$dst, GR16:$src)>; - -def : InstAlias<"movzx $src, $dst", - (MOVZX64rr8_Q GR64:$dst, GR8:$src)>; -def : InstAlias<"movzx $src, $dst", - (MOVZX64rr16_Q GR64:$dst, GR16:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX16rr8W GR16:$dst, GR8:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX16rm8W GR16:$dst, i8mem:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX32rr8 GR32:$dst, GR8:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX32rr16 GR32:$dst, GR16:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX64rr8_Q GR64:$dst, GR8:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX64rr16_Q GR64:$dst, GR16:$src)>; // Note: No GR32->GR64 movzx form. |