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author | Craig Topper <craig.topper@gmail.com> | 2013-10-14 04:55:01 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2013-10-14 04:55:01 +0000 |
commit | c6f7c99809cece8c85e180c1b95e6159d8ea9613 (patch) | |
tree | 0a9ba17311321226fcbbba638fa6ba333d583ed2 /lib/Target/X86/X86InstrInfo.td | |
parent | 8e121843c19297205fe9acb9153570f596838eb9 (diff) | |
download | external_llvm-c6f7c99809cece8c85e180c1b95e6159d8ea9613.zip external_llvm-c6f7c99809cece8c85e180c1b95e6159d8ea9613.tar.gz external_llvm-c6f7c99809cece8c85e180c1b95e6159d8ea9613.tar.bz2 |
Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192567 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.td')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index ede418d..d65471e 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -502,6 +502,14 @@ class ImmZExtAsmOperandClass : AsmOperandClass { let RenderMethod = "addImmOperands"; } +def X86GR32orGR64AsmOperand : AsmOperandClass { + let Name = "GR32orGR64"; +} + +def GR32orGR64 : RegisterOperand<GR32> { + let ParserMatchClass = X86GR32orGR64AsmOperand; +} + // Sign-extended immediate classes. We don't need to define the full lattice // here because there is no instruction with an ambiguity between ImmSExti64i32 // and ImmSExti32i8. |