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| author | Evan Cheng <evan.cheng@apple.com> | 2006-04-12 23:42:44 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-04-12 23:42:44 +0000 |
| commit | d2a6d54f2621502713745bb86c92b6c35c759e3a (patch) | |
| tree | 6883665bcaf56e47e303c8675e7f24d8f77f996d /lib/Target/X86/X86InstrMMX.td | |
| parent | 42aa3a59c950d7aff8b6466396878ee5125869d4 (diff) | |
| download | external_llvm-d2a6d54f2621502713745bb86c92b6c35c759e3a.zip external_llvm-d2a6d54f2621502713745bb86c92b6c35c759e3a.tar.gz external_llvm-d2a6d54f2621502713745bb86c92b6c35c759e3a.tar.bz2 | |
SSE / SSE2 conversion intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27637 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrMMX.td')
| -rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index 7944099..723038a 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -14,7 +14,13 @@ //===----------------------------------------------------------------------===// // Instruction templates -// MMXi8 - MMX instructions with ImmT == Imm8 and TB prefix. +// MMXI - MMX instructions with TB prefix. +// MMX2I - MMX / SSE2 instructions with TB and OpSize prefixes. +// MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix. +class MMXI<bits<8> o, Format F, dag ops, string asm, list<dag> pattern> + : I<o, F, ops, asm, pattern>, TB, Requires<[HasMMX]>; +class MMX2I<bits<8> o, Format F, dag ops, string asm, list<dag> pattern> + : I<o, F, ops, asm, pattern>, TB, OpSize, Requires<[HasSSE2]>; class MMXIi8<bits<8> o, Format F, dag ops, string asm, list<dag> pattern> : X86Inst<o, F, Imm8, ops, asm>, TB, Requires<[HasMMX]> { let Pattern = pattern; @@ -51,12 +57,28 @@ def MOVQ64mr : I<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src), Requires<[HasMMX]>; // Conversion instructions +def CVTPI2PSrr : MMXI<0x2A, MRMSrcReg, (ops VR128:$dst, VR64:$src), + "cvtpi2ps {$src, $dst|$dst, $src}", []>; +def CVTPI2PSrm : MMXI<0x2A, MRMSrcMem, (ops VR128:$dst, i64mem:$src), + "cvtpi2ps {$src, $dst|$dst, $src}", []>; +def CVTPI2PDrr : MMX2I<0x2A, MRMSrcReg, (ops VR128:$dst, VR64:$src), + "cvtpi2pd {$src, $dst|$dst, $src}", []>; +def CVTPI2PDrm : MMX2I<0x2A, MRMSrcMem, (ops VR128:$dst, i64mem:$src), + "cvtpi2pd {$src, $dst|$dst, $src}", []>; def CVTTPS2PIrr: I<0x2C, MRMSrcReg, (ops VR64:$dst, VR128:$src), "cvttps2pi {$src, $dst|$dst, $src}", []>, TB, Requires<[HasSSE2]>; def CVTTPS2PIrm: I<0x2C, MRMSrcMem, (ops VR64:$dst, f64mem:$src), "cvttps2pi {$src, $dst|$dst, $src}", []>, TB, Requires<[HasMMX]>; +def CVTPS2PIrr : MMXI<0x2D, MRMSrcReg, (ops VR64:$dst, VR128:$src), + "cvtps2pi {$src, $dst|$dst, $src}", []>; +def CVTPS2PIrm : MMXI<0x2D, MRMSrcMem, (ops VR64:$dst, f64mem:$src), + "cvtps2pi {$src, $dst|$dst, $src}", []>; +def CVTPD2PIrr : MMX2I<0x2D, MRMSrcReg, (ops VR64:$dst, VR128:$src), + "cvtpd2pi {$src, $dst|$dst, $src}", []>; +def CVTPD2PIrm : MMX2I<0x2D, MRMSrcMem, (ops VR64:$dst, f128mem:$src), + "cvtpd2pi {$src, $dst|$dst, $src}", []>; // Shuffle and unpack instructions def PSHUFWri : MMXIi8<0x70, MRMSrcReg, |