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authorCraig Topper <craig.topper@gmail.com>2013-09-16 04:29:58 +0000
committerCraig Topper <craig.topper@gmail.com>2013-09-16 04:29:58 +0000
commit5fefc00bac5ddd6f0700e71169bd7823af6b7c65 (patch)
treeb19235703911d973db77dc5ffd79ddfb1b2c91e4 /lib/Target/X86/X86InstrSSE.td
parent1e3037f0be430ef2339838bbdede11f45658bd82 (diff)
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Make F16C feature flag imply AVX rather than just checking both at the patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190775 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrSSE.td')
-rw-r--r--lib/Target/X86/X86InstrSSE.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 45789db..5aa5be6 100644
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -8010,7 +8010,7 @@ multiclass f16c_ps2ph<RegisterClass RC, X86MemOperand x86memop, Intrinsic Int> {
TA, OpSize, VEX;
}
-let Predicates = [HasAVX, HasF16C] in {
+let Predicates = [HasF16C] in {
defm VCVTPH2PS : f16c_ph2ps<VR128, f64mem, int_x86_vcvtph2ps_128>;
defm VCVTPH2PSY : f16c_ph2ps<VR256, f128mem, int_x86_vcvtph2ps_256>, VEX_L;
defm VCVTPS2PH : f16c_ps2ph<VR128, f64mem, int_x86_vcvtps2ph_128>;