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| author | Ben Langmuir <ben.langmuir@intel.com> | 2013-09-14 15:03:21 +0000 |
|---|---|---|
| committer | Ben Langmuir <ben.langmuir@intel.com> | 2013-09-14 15:03:21 +0000 |
| commit | a247e9d42b03851be8425631e2716d4ff9f37c47 (patch) | |
| tree | 0bad02332ca1bde322c4d9949d0a18feea6a8e3a /lib/Target/X86/X86InstrSSE.td | |
| parent | 4873c157f3b6776968f63f66bc76f839bdaf128e (diff) | |
| download | external_llvm-a247e9d42b03851be8425631e2716d4ff9f37c47.zip external_llvm-a247e9d42b03851be8425631e2716d4ff9f37c47.tar.gz external_llvm-a247e9d42b03851be8425631e2716d4ff9f37c47.tar.bz2 | |
Add the remaining Intel SHA instructions
Also assembly/disassembly tests, and for sha256rnds2, aliases with an explicit
xmm0 dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190754 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrSSE.td')
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 16cad1e..45789db 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -7395,6 +7395,17 @@ let Constraints = "$src1 = $dst" in { // SHA-NI Instructions //===----------------------------------------------------------------------===// +multiclass SHAI_binop<bits<8> Opc, string OpcodeStr> { + def rr : I<Opc, MRMSrcReg, (outs VR128:$dst), + (ins VR128:$src1, VR128:$src2), + !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>, T8; + + let mayLoad = 1 in + def rm : I<Opc, MRMSrcMem, (outs VR128:$dst), + (ins VR128:$src1, i128mem:$src2), + !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>, T8; +} + let Constraints = "$src1 = $dst", hasSideEffects = 0, Predicates = [HasSHA] in { def SHA1RNDS4rri : Ii8<0xCC, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i8imm:$src3), @@ -7405,8 +7416,24 @@ let Constraints = "$src1 = $dst", hasSideEffects = 0, Predicates = [HasSHA] in { (ins VR128:$src1, i128mem:$src2, i8imm:$src3), "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}", []>, TA; + + defm SHA1NEXTE : SHAI_binop<0xC8, "sha1nexte">; + defm SHA1MSG1 : SHAI_binop<0xC9, "sha1msg1">; + defm SHA1MSG2 : SHAI_binop<0xCA, "sha1msg2">; + + let Uses=[XMM0] in + defm SHA256RNDS2 : SHAI_binop<0xCB, "sha256rnds2">; + + defm SHA256MSG1 : SHAI_binop<0xCC, "sha256msg1">; + defm SHA256MSG2 : SHAI_binop<0xCD, "sha256msg2">; } +// Aliases with explicit %xmm0 +def : InstAlias<"sha256rnds2\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}", + (SHA256RNDS2rr VR128:$dst, VR128:$src2)>; +def : InstAlias<"sha256rnds2\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}", + (SHA256RNDS2rm VR128:$dst, i128mem:$src2)>; + //===----------------------------------------------------------------------===// // AES-NI Instructions //===----------------------------------------------------------------------===// |