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authorMichael Liao <michael.liao@intel.com>2013-03-26 22:47:01 +0000
committerMichael Liao <michael.liao@intel.com>2013-03-26 22:47:01 +0000
commitf8fd883fd368316ad3738dad6c15b1b8f3850f88 (patch)
tree948e0da9a0208da4b0a3284f7b9da08c29cdb3bd /lib/Target/X86/X86InstrTSX.td
parent0ca1a7f177ffd29c0af49f23cc7bd5f0b56a60d0 (diff)
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Add XTEST codegen support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178083 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrTSX.td')
-rw-r--r--lib/Target/X86/X86InstrTSX.td6
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrTSX.td b/lib/Target/X86/X86InstrTSX.td
index d316cf5..363a190 100644
--- a/lib/Target/X86/X86InstrTSX.td
+++ b/lib/Target/X86/X86InstrTSX.td
@@ -15,6 +15,9 @@
//===----------------------------------------------------------------------===//
// TSX instructions
+def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>,
+ [SDNPHasChain, SDNPSideEffect]>;
+
let usesCustomInserter = 1 in
def XBEGIN : I<0, Pseudo, (outs GR32:$dst), (ins),
"# XBEGIN", [(set GR32:$dst, (int_x86_xbegin))]>,
@@ -28,7 +31,8 @@ def XEND : I<0x01, MRM_D5, (outs), (ins),
"xend", [(int_x86_xend)]>, TB, Requires<[HasRTM]>;
let Defs = [EFLAGS] in
-def XTEST : I<0x01, MRM_D6, (outs), (ins), "xtest", []>, TB, Requires<[HasRTM]>;
+def XTEST : I<0x01, MRM_D6, (outs), (ins),
+ "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasTSX]>;
def XABORT : Ii8<0xc6, MRM_F8, (outs), (ins i8imm:$imm),
"xabort\t$imm",