Better implementation of truncate. ISel matches it to a pseudo instruction

that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28119 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 34 insertions, 101 deletions

diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp
index af58df1..a63be04 100755
--- a/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -101,9 +101,15 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
   const MRegisterInfo &RI = *TM.getRegisterInfo();
   switch (MO.getType()) {
   case MachineOperand::MO_Register:
-    if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
-      O << RI.get(MO.getReg()).Name;
-    else
+    if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
+      unsigned Reg = MO.getReg();
+      if (Modifier && strncmp(Modifier, "trunc", strlen("trunc")) == 0) {
+        MVT::ValueType VT = (strcmp(Modifier,"trunc16") == 0)
+          ? MVT::i16 : MVT::i32;
+        Reg = getX86SubSuperRegister(Reg, VT);
+      }
+      O << RI.get(Reg).Name;
+    } else
       O << "reg" << MO.getReg();
     return;
 
@@ -240,116 +246,23 @@ bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
                                            const char Mode) {
   const MRegisterInfo &RI = *TM.getRegisterInfo();
   unsigned Reg = MO.getReg();
-  const char *Name = RI.get(Reg).Name;
   switch (Mode) {
   default: return true;  // Unknown mode.
   case 'b': // Print QImode register
-    switch (Reg) {
-    default: return true;
-    case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
-      Name = "AL";
-      break;
-    case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
-      Name = "DL";
-      break;
-    case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
-      Name = "CL";
-      break;
-    case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
-      Name = "BL";
-      break;
-    case X86::ESI:
-      Name = "SIL";
-      break;
-    case X86::EDI:
-      Name = "DIL";
-      break;
-    case X86::EBP:
-      Name = "BPL";
-      break;
-    case X86::ESP:
-      Name = "SPL";
-      break;
-    }
+    Reg = getX86SubSuperRegister(Reg, MVT::i8);
     break;
   case 'h': // Print QImode high register
-    switch (Reg) {
-    default: return true;
-    case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
-      Name = "AL";
-      break;
-    case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
-      Name = "DL";
-      break;
-    case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
-      Name = "CL";
-      break;
-    case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
-      Name = "BL";
-      break;
-    }
+    Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
     break;
   case 'w': // Print HImode register
-    switch (Reg) {
-    default: return true;
-    case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
-      Name = "AX";
-      break;
-    case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
-      Name = "DX";
-      break;
-    case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
-      Name = "CX";
-      break;
-    case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
-      Name = "BX";
-      break;
-    case X86::ESI:
-      Name = "SI";
-      break;
-    case X86::EDI:
-      Name = "DI";
-      break;
-    case X86::EBP:
-      Name = "BP";
-      break;
-    case X86::ESP:
-      Name = "SP";
-      break;
-    }
+    Reg = getX86SubSuperRegister(Reg, MVT::i16);
     break;
   case 'k': // Print SImode register
-    switch (Reg) {
-    default: return true;
-    case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
-      Name = "EAX";
-      break;
-    case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
-      Name = "EDX";
-      break;
-    case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
-      Name = "ECX";
-      break;
-    case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
-      Name = "EBX";
-      break;
-    case X86::ESI:
-      Name = "ESI";
-      break;
-    case X86::EDI:
-      Name = "EDI";
-      break;
-    case X86::EBP:
-      Name = "EBP";
-      break;
-    case X86::ESP:
-      Name = "ESP";
-      break;
-    }
+    Reg = getX86SubSuperRegister(Reg, MVT::i32);
     break;
   }
 
-  O << Name;
+  O << '%' << RI.get(Reg).Name;
   return false;
 }
 
@@ -392,6 +305,26 @@ bool X86IntelAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
 void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
   ++EmittedInsts;
 
+  // See if a truncate instruction can be turned into a nop.
+  switch (MI->getOpcode()) {
+  default: break;
+  case X86::TRUNC_R32_R16:
+  case X86::TRUNC_R32_R8:
+  case X86::TRUNC_R16_R8: {
+    const MachineOperand &MO0 = MI->getOperand(0);
+    const MachineOperand &MO1 = MI->getOperand(1);
+    unsigned Reg0 = MO0.getReg();
+    unsigned Reg1 = MO1.getReg();
+    if (MI->getOpcode() == X86::TRUNC_R16_R8)
+      Reg0 = getX86SubSuperRegister(Reg0, MVT::i16);
+    else
+      Reg0 = getX86SubSuperRegister(Reg0, MVT::i32);
+    if (Reg0 == Reg1)
+      O << CommentString << " TRUNCATE ";
+    break;
+  }
+  }
+
   // Call the autogenerated instruction printer routines.
   printInstruction(MI);
 }