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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2010-08-17 21:06:07 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2010-08-17 21:06:07 +0000 |
| commit | 3a1e54a6b97f81d61d5de38d220b2b75746ae481 (patch) | |
| tree | 9d6fb1cc6f8d1b7623cd3a6e1438753a347c568f /lib/Target/X86/X86MCInstLower.cpp | |
| parent | e9df15e65c28f13287c7fe69f0c5dafe2e8fa48b (diff) | |
| download | external_llvm-3a1e54a6b97f81d61d5de38d220b2b75746ae481.zip external_llvm-3a1e54a6b97f81d61d5de38d220b2b75746ae481.tar.gz external_llvm-3a1e54a6b97f81d61d5de38d220b2b75746ae481.tar.bz2 | |
More fixes for win64:
- Do not clobber al during variadic calls, this is AMD64 ABI-only feature
- Emit wincall64, where necessary
Patch by Cameron Esfahani!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111289 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86MCInstLower.cpp')
| -rw-r--r-- | lib/Target/X86/X86MCInstLower.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp index 087a3bd..8c4620f 100644 --- a/lib/Target/X86/X86MCInstLower.cpp +++ b/lib/Target/X86/X86MCInstLower.cpp @@ -401,12 +401,14 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr break; - // TAILJMPr64, CALL64r, CALL64pcrel32 - These instructions have + // TAILJMPr64, [WIN]CALL64r, [WIN]CALL64pcrel32 - These instructions have // register inputs modeled as normal uses instead of implicit uses. As such, // truncate off all but the first operand (the callee). FIXME: Change isel. case X86::TAILJMPr64: case X86::CALL64r: - case X86::CALL64pcrel32: { + case X86::CALL64pcrel32: + case X86::WINCALL64r: + case X86::WINCALL64pcrel32: { unsigned Opcode = OutMI.getOpcode(); MCOperand Saved = OutMI.getOperand(0); OutMI = MCInst(); |