[Stackmap] Add AnyReg calling convention support for patchpoint intrinsic.

The idea of the AnyReg Calling Convention is to provide the call arguments in
registers, but not to force them to be placed in a paticular order into a
specified set of registers. Instead it is up tp the register allocator to assign
any register as it sees fit. The same applies to the return value (if
applicable).

Differential Revision: http://llvm-reviews.chandlerc.com/D2009

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194293 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 27 insertions, 8 deletions

diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp
index 92a1118..fa15114 100644
--- a/lib/Target/X86/X86MCInstLower.cpp
+++ b/lib/Target/X86/X86MCInstLower.cpp
@@ -780,26 +780,45 @@ static void LowerSTACKMAP(MCStreamer &OutStreamer,
 static void LowerPATCHPOINT(MCStreamer &OutStreamer,
                             X86MCInstLower &MCInstLowering,
                             StackMaps &SM,
-                            const MachineInstr &MI)
-{
-  int64_t ID = MI.getOperand(0).getImm();
+                            const MachineInstr &MI) {
+  bool hasDef = MI.getOperand(0).isReg() && MI.getOperand(0).isDef() &&
+                !MI.getOperand(0).isImplicit();
+  unsigned StartIdx = hasDef ? 1 : 0;
+#ifndef NDEBUG
+  unsigned StartIdx2 = 0, e = MI.getNumOperands();
+  while (StartIdx2 < e && MI.getOperand(StartIdx2).isReg() &&
+         MI.getOperand(StartIdx2).isDef() &&
+         !MI.getOperand(StartIdx2).isImplicit())
+    ++StartIdx2;
+
+  assert(StartIdx == StartIdx2 &&
+         "Unexpected additonal definition in Patchpoint intrinsic.");
+#endif
+
+  int64_t ID = MI.getOperand(StartIdx).getImm();
   assert((int32_t)ID == ID && "Stack maps hold 32-bit IDs");
 
   // Get the number of arguments participating in the call. This number was
   // adjusted during call lowering by subtracting stack args.
-  int64_t StackMapIdx = MI.getOperand(3).getImm() + 4;
-  assert(StackMapIdx <= MI.getNumOperands() && "Patchpoint dropped args.");
+  bool isAnyRegCC = MI.getOperand(StartIdx + 4).getImm() == CallingConv::AnyReg;
+  assert(((hasDef && isAnyRegCC) || !hasDef) &&
+         "Only Patchpoints with AnyReg calling convention may have a result");
+  int64_t StackMapIdx = isAnyRegCC ? StartIdx + 5 :
+    StartIdx + 5 + MI.getOperand(StartIdx + 3).getImm();
+  assert(StackMapIdx <= MI.getNumOperands() &&
+         "Patchpoint intrinsic dropped arguments.");
 
   SM.recordStackMap(MI, ID, llvm::next(MI.operands_begin(), StackMapIdx),
-                     getStackMapEndMOP(MI.operands_begin(), MI.operands_end()));
+                    getStackMapEndMOP(MI.operands_begin(), MI.operands_end()),
+                    isAnyRegCC && hasDef);
 
   // Emit call. We need to know how many bytes we encoded here.
   unsigned EncodedBytes = 2;
   OutStreamer.EmitInstruction(MCInstBuilder(X86::CALL64r)
-                              .addReg(MI.getOperand(2).getReg()));
+                              .addReg(MI.getOperand(StartIdx + 2).getReg()));
 
   // Emit padding.
-  unsigned NumNOPBytes = MI.getOperand(1).getImm();
+  unsigned NumNOPBytes = MI.getOperand(StartIdx + 1).getImm();
   assert(NumNOPBytes >= EncodedBytes &&
          "Patchpoint can't request size less than the length of a call.");