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| author | Chris Lattner <sabre@nondot.org> | 2010-09-22 05:29:50 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-09-22 05:29:50 +0000 |
| commit | bc57c6db4a3a1f5df4450d8dbb100e1eb6944c28 (patch) | |
| tree | dc7198801624bf6dc9a5f6bbec1c5fd419174f8e /lib/Target/X86/X86RegisterInfo.cpp | |
| parent | f7d4da0c1dcdac3941fe440982bce19706541629 (diff) | |
| download | external_llvm-bc57c6db4a3a1f5df4450d8dbb100e1eb6944c28.zip external_llvm-bc57c6db4a3a1f5df4450d8dbb100e1eb6944c28.tar.gz external_llvm-bc57c6db4a3a1f5df4450d8dbb100e1eb6944c28.tar.bz2 | |
fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"
Teaching the code generator about CR8-15, how to rex them up, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114533 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86RegisterInfo.cpp')
| -rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 55 |
1 files changed, 15 insertions, 40 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index fedd49e..3654f4e 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -159,46 +159,21 @@ unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) { case X86::YMM7: case X86::YMM15: case X86::MM7: return 7; - case X86::ES: - return 0; - case X86::CS: - return 1; - case X86::SS: - return 2; - case X86::DS: - return 3; - case X86::FS: - return 4; - case X86::GS: - return 5; - - case X86::CR0: - return 0; - case X86::CR1: - return 1; - case X86::CR2: - return 2; - case X86::CR3: - return 3; - case X86::CR4: - return 4; - - case X86::DR0: - return 0; - case X86::DR1: - return 1; - case X86::DR2: - return 2; - case X86::DR3: - return 3; - case X86::DR4: - return 4; - case X86::DR5: - return 5; - case X86::DR6: - return 6; - case X86::DR7: - return 7; + case X86::ES: return 0; + case X86::CS: return 1; + case X86::SS: return 2; + case X86::DS: return 3; + case X86::FS: return 4; + case X86::GS: return 5; + + case X86::CR0: case X86::CR8 : case X86::DR0: return 0; + case X86::CR1: case X86::CR9 : case X86::DR1: return 1; + case X86::CR2: case X86::CR10: case X86::DR2: return 2; + case X86::CR3: case X86::CR11: case X86::DR3: return 3; + case X86::CR4: case X86::CR12: case X86::DR4: return 4; + case X86::CR5: case X86::CR13: case X86::DR5: return 5; + case X86::CR6: case X86::CR14: case X86::DR6: return 6; + case X86::CR7: case X86::CR15: case X86::DR7: return 7; // Pseudo index registers are equivalent to a "none" // scaled index (See Intel Manual 2A, table 2-3) |