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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-03-25 23:12:41 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-03-25 23:12:41 +0000 |
| commit | 68d832a04dc87ec9bff72e325d81da2a806452b9 (patch) | |
| tree | 824a5d3ad118d4ef07871582b9ca34d383c23868 /lib/Target/X86/X86ScheduleAtom.td | |
| parent | b203ef3938d2d6de2c64420a9a3f9855cf7b49b2 (diff) | |
| download | external_llvm-68d832a04dc87ec9bff72e325d81da2a806452b9.zip external_llvm-68d832a04dc87ec9bff72e325d81da2a806452b9.tar.gz external_llvm-68d832a04dc87ec9bff72e325d81da2a806452b9.tar.bz2 | |
Remove IIC_DEFAULT from X86Schedule.td
All the instructions tagged with IIC_DEFAULT had nothing in common, and
we already have a NoItineraries class to represent untagged
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177937 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ScheduleAtom.td')
| -rw-r--r-- | lib/Target/X86/X86ScheduleAtom.td | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ScheduleAtom.td b/lib/Target/X86/X86ScheduleAtom.td index 1e5f2d6..cce8f1b 100644 --- a/lib/Target/X86/X86ScheduleAtom.td +++ b/lib/Target/X86/X86ScheduleAtom.td @@ -33,7 +33,6 @@ def AtomItineraries : ProcessorItineraries< // InstrItinData<class, [InstrStage<N, [P0], 0>, InstrStage<N, [P1]>] >, // // Default is 1 cycle, port0 or port1 - InstrItinData<IIC_DEFAULT, [InstrStage<1, [Port0, Port1]>] >, InstrItinData<IIC_ALU_MEM, [InstrStage<1, [Port0]>] >, InstrItinData<IIC_ALU_NONMEM, [InstrStage<1, [Port0, Port1]>] >, InstrItinData<IIC_LEA, [InstrStage<1, [Port1]>] >, |