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authorAndrew Trick <atrick@apple.com>2012-02-29 19:44:41 +0000
committerAndrew Trick <atrick@apple.com>2012-02-29 19:44:41 +0000
commit9fd58f05d5f87ca4c4113eb3f78e1932a4e2f8d5 (patch)
tree36e987abd38c7ca2645c38f39d97fc8f88e1f2a4 /lib/Target/X86/X86ScheduleAtom.td
parentf1c42068c2afe1f413e4375733f0f311c1726db9 (diff)
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Intel Atom instruction itineraries for mov sign extension and mov zero extension.
Patch by Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151743 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ScheduleAtom.td')
-rw-r--r--lib/Target/X86/X86ScheduleAtom.td11
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ScheduleAtom.td b/lib/Target/X86/X86ScheduleAtom.td
index 67cd0f2..e8cf72a 100644
--- a/lib/Target/X86/X86ScheduleAtom.td
+++ b/lib/Target/X86/X86ScheduleAtom.td
@@ -133,6 +133,17 @@ def AtomItineraries : ProcessorItineraries<
//ret
InstrItinData<IIC_RET, [InstrStage<79, [Port0, Port1]>] >,
InstrItinData<IIC_RET_IMM, [InstrStage<1, [Port0], 0>, InstrStage<1, [Port1]>] >,
+ //sign extension movs
+ InstrItinData<IIC_MOVSX,[InstrStage<1, [Port0] >] >,
+ InstrItinData<IIC_MOVSX_R16_R8, [InstrStage<2, [Port0, Port1]>] >,
+ InstrItinData<IIC_MOVSX_R16_M8, [InstrStage<3, [Port0, Port1]>] >,
+ InstrItinData<IIC_MOVSX_R16_R16, [InstrStage<1, [Port0, Port1]>] >,
+ InstrItinData<IIC_MOVSX_R32_R32, [InstrStage<1, [Port0, Port1]>] >,
+ //zero extension movs
+ InstrItinData<IIC_MOVZX,[InstrStage<1, [Port0]>] >,
+ InstrItinData<IIC_MOVZX_R16_R8, [InstrStage<2, [Port0, Port1]>] >,
+ InstrItinData<IIC_MOVZX_R16_M8, [InstrStage<3, [Port0, Port1]>] >,
+
// SSE binary operations
// arithmetic fp scalar
InstrItinData<IIC_SSE_ALU_F32S_RR, [InstrStage<5, [Port1]>] >,