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author | Stephen Hines <srhines@google.com> | 2014-04-23 16:57:46 -0700 |
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committer | Stephen Hines <srhines@google.com> | 2014-04-24 15:53:16 -0700 |
commit | 36b56886974eae4f9c5ebc96befd3e7bfe5de338 (patch) | |
tree | e6cfb69fbbd937f450eeb83bfb83b9da3b01275a /lib/Target/X86/X86TargetMachine.h | |
parent | 69a8640022b04415ae9fac62f8ab090601d8f889 (diff) | |
download | external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.zip external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.tar.gz external_llvm-36b56886974eae4f9c5ebc96befd3e7bfe5de338.tar.bz2 |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
Diffstat (limited to 'lib/Target/X86/X86TargetMachine.h')
-rw-r--r-- | lib/Target/X86/X86TargetMachine.h | 103 |
1 files changed, 24 insertions, 79 deletions
diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index 174d391..57e6eda 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -14,7 +14,6 @@ #ifndef X86TARGETMACHINE_H #define X86TARGETMACHINE_H -#include "X86.h" #include "X86FrameLowering.h" #include "X86ISelLowering.h" #include "X86InstrInfo.h" @@ -22,114 +21,60 @@ #include "X86SelectionDAGInfo.h" #include "X86Subtarget.h" #include "llvm/IR/DataLayout.h" -#include "llvm/Target/TargetFrameLowering.h" #include "llvm/Target/TargetMachine.h" namespace llvm { class StringRef; -class X86TargetMachine : public LLVMTargetMachine { +class X86TargetMachine final : public LLVMTargetMachine { + virtual void anchor(); X86Subtarget Subtarget; X86FrameLowering FrameLowering; InstrItineraryData InstrItins; + const DataLayout DL; // Calculates type size & alignment + X86InstrInfo InstrInfo; + X86TargetLowering TLInfo; + X86SelectionDAGInfo TSInfo; + X86JITInfo JITInfo; public: X86TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, - CodeGenOpt::Level OL, - bool is64Bit); + CodeGenOpt::Level OL); - virtual const X86InstrInfo *getInstrInfo() const { - llvm_unreachable("getInstrInfo not implemented"); + const DataLayout *getDataLayout() const override { return &DL; } + const X86InstrInfo *getInstrInfo() const override { + return &InstrInfo; } - virtual const TargetFrameLowering *getFrameLowering() const { + const TargetFrameLowering *getFrameLowering() const override { return &FrameLowering; } - virtual X86JITInfo *getJITInfo() { - llvm_unreachable("getJITInfo not implemented"); + X86JITInfo *getJITInfo() override { + return &JITInfo; } - virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; } - virtual const X86TargetLowering *getTargetLowering() const { - llvm_unreachable("getTargetLowering not implemented"); + const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; } + const X86TargetLowering *getTargetLowering() const override { + return &TLInfo; } - virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { - llvm_unreachable("getSelectionDAGInfo not implemented"); + const X86SelectionDAGInfo *getSelectionDAGInfo() const override { + return &TSInfo; } - virtual const X86RegisterInfo *getRegisterInfo() const { + const X86RegisterInfo *getRegisterInfo() const override { return &getInstrInfo()->getRegisterInfo(); } - virtual const InstrItineraryData *getInstrItineraryData() const { + const InstrItineraryData *getInstrItineraryData() const override { return &InstrItins; } /// \brief Register X86 analysis passes with a pass manager. - virtual void addAnalysisPasses(PassManagerBase &PM); + void addAnalysisPasses(PassManagerBase &PM) override; // Set up the pass pipeline. - virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); - - virtual bool addCodeEmitter(PassManagerBase &PM, - JITCodeEmitter &JCE); -}; - -/// X86_32TargetMachine - X86 32-bit target machine. -/// -class X86_32TargetMachine : public X86TargetMachine { - virtual void anchor(); - const DataLayout DL; // Calculates type size & alignment - X86InstrInfo InstrInfo; - X86TargetLowering TLInfo; - X86SelectionDAGInfo TSInfo; - X86JITInfo JITInfo; -public: - X86_32TargetMachine(const Target &T, StringRef TT, - StringRef CPU, StringRef FS, const TargetOptions &Options, - Reloc::Model RM, CodeModel::Model CM, - CodeGenOpt::Level OL); - virtual const DataLayout *getDataLayout() const { return &DL; } - virtual const X86TargetLowering *getTargetLowering() const { - return &TLInfo; - } - virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { - return &TSInfo; - } - virtual const X86InstrInfo *getInstrInfo() const { - return &InstrInfo; - } - virtual X86JITInfo *getJITInfo() { - return &JITInfo; - } -}; + TargetPassConfig *createPassConfig(PassManagerBase &PM) override; -/// X86_64TargetMachine - X86 64-bit target machine. -/// -class X86_64TargetMachine : public X86TargetMachine { - virtual void anchor(); - const DataLayout DL; // Calculates type size & alignment - X86InstrInfo InstrInfo; - X86TargetLowering TLInfo; - X86SelectionDAGInfo TSInfo; - X86JITInfo JITInfo; -public: - X86_64TargetMachine(const Target &T, StringRef TT, - StringRef CPU, StringRef FS, const TargetOptions &Options, - Reloc::Model RM, CodeModel::Model CM, - CodeGenOpt::Level OL); - virtual const DataLayout *getDataLayout() const { return &DL; } - virtual const X86TargetLowering *getTargetLowering() const { - return &TLInfo; - } - virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { - return &TSInfo; - } - virtual const X86InstrInfo *getInstrInfo() const { - return &InstrInfo; - } - virtual X86JITInfo *getJITInfo() { - return &JITInfo; - } + bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override; }; } // End llvm namespace |