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authorDuncan Sands <baldrick@free.fr>2009-04-21 09:44:39 +0000
committerDuncan Sands <baldrick@free.fr>2009-04-21 09:44:39 +0000
commit005e7984ccc20c65a3bdfc112021b337935131a9 (patch)
tree8069395f8c9d8485d8bf8097f4c64c4e0b25ca8a /lib/Target/X86
parent7daa13c2a4299a1a52eda8ae2746f0a0f2893315 (diff)
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Get rid of what looks like a copy-and-pasted typo.
Spotted by gcc-4.5. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69673 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 59cf85b..d51435c 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -9075,7 +9075,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
}
if (DestReg) {
Res.first = DestReg;
- Res.second = Res.second = X86::GR8RegisterClass;
+ Res.second = X86::GR8RegisterClass;
}
} else if (VT == MVT::i32) {
unsigned DestReg = 0;
@@ -9092,7 +9092,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
}
if (DestReg) {
Res.first = DestReg;
- Res.second = Res.second = X86::GR32RegisterClass;
+ Res.second = X86::GR32RegisterClass;
}
} else if (VT == MVT::i64) {
unsigned DestReg = 0;
@@ -9109,7 +9109,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
}
if (DestReg) {
Res.first = DestReg;
- Res.second = Res.second = X86::GR64RegisterClass;
+ Res.second = X86::GR64RegisterClass;
}
}
} else if (Res.second == X86::FR32RegisterClass ||