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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2009-05-30 20:51:52 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2009-05-30 20:51:52 +0000
commit1ea31ff434f7966f3d8b2c158b4f20950e94e80d (patch)
tree1e3eb946af54ca0dd5e57486978e10f11d2a4210 /lib/Target/X86
parent464c05f504c6bf929f26a98f60b551905c12dcd1 (diff)
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First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
-rw-r--r--lib/Target/X86/X86.h8
-rw-r--r--lib/Target/X86/X86CodeEmitter.cpp78
-rw-r--r--lib/Target/X86/X86JITInfo.cpp81
-rw-r--r--lib/Target/X86/X86JITInfo.h13
-rw-r--r--lib/Target/X86/X86TargetMachine.cpp43
-rw-r--r--lib/Target/X86/X86TargetMachine.h5
6 files changed, 156 insertions, 72 deletions
diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index a9ac859..fe0dca6 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -22,6 +22,7 @@ namespace llvm {
class X86TargetMachine;
class FunctionPass;
class MachineCodeEmitter;
+class JITCodeEmitter;
class raw_ostream;
/// createX86ISelDag - This pass converts a legalized DAG into a
@@ -51,8 +52,11 @@ FunctionPass *createX86CodePrinterPass(raw_ostream &o,
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
/// to the specified MCE object.
-FunctionPass *createX86CodeEmitterPass(X86TargetMachine &TM,
- MachineCodeEmitter &MCE);
+
+FunctionPass *createX86CodeEmitterPass(
+ X86TargetMachine &TM, MachineCodeEmitter &MCE);
+FunctionPass *createX86JITCodeEmitterPass(
+ X86TargetMachine &TM, JITCodeEmitter &JCE);
/// createX86EmitCodeToMemory - Returns a pass that converts a register
/// allocated function into raw machine code in a dynamically
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index efd64e0..47d7625 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -21,6 +21,7 @@
#include "X86.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
+#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
@@ -35,21 +36,22 @@ using namespace llvm;
STATISTIC(NumEmitted, "Number of machine instructions emitted");
namespace {
+template< class machineCodeEmitter>
class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass {
const X86InstrInfo *II;
const TargetData *TD;
X86TargetMachine &TM;
- MachineCodeEmitter &MCE;
+ machineCodeEmitter &MCE;
intptr_t PICBaseOffset;
bool Is64BitMode;
bool IsPIC;
public:
static char ID;
- explicit Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
+ explicit Emitter(X86TargetMachine &tm, machineCodeEmitter &mce)
: MachineFunctionPass(&ID), II(0), TD(0), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(false),
IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
- Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce,
+ Emitter(X86TargetMachine &tm, machineCodeEmitter &mce,
const X86InstrInfo &ii, const TargetData &td, bool is64)
: MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(is64),
@@ -96,17 +98,31 @@ namespace {
bool gvNeedsNonLazyPtr(const GlobalValue *GV);
};
- char Emitter::ID = 0;
+
+template< class machineCodeEmitter>
+ char Emitter<machineCodeEmitter>::ID = 0;
}
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
-/// to the specified MCE object.
-FunctionPass *llvm::createX86CodeEmitterPass(X86TargetMachine &TM,
- MachineCodeEmitter &MCE) {
- return new Emitter(TM, MCE);
+/// to the specified templated MachineCodeEmitter object.
+
+namespace llvm {
+
+FunctionPass *createX86CodeEmitterPass(
+ X86TargetMachine &TM, MachineCodeEmitter &MCE)
+{
+ return new Emitter<MachineCodeEmitter>(TM, MCE);
+}
+FunctionPass *createX86JITCodeEmitterPass(
+ X86TargetMachine &TM, JITCodeEmitter &JCE)
+{
+ return new Emitter<JITCodeEmitter>(TM, JCE);
}
-bool Emitter::runOnMachineFunction(MachineFunction &MF) {
+} // end namespace llvm
+
+template< class machineCodeEmitter>
+bool Emitter<machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
@@ -140,7 +156,8 @@ bool Emitter::runOnMachineFunction(MachineFunction &MF) {
/// necessary to resolve the address of this block later and emits a dummy
/// value.
///
-void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
// Remember where this reference was and where it is to so we can
// deal with it later.
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
@@ -151,7 +168,8 @@ void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
/// emitGlobalAddress - Emit the specified address to the code stream assuming
/// this is part of a "take the address of a global" instruction.
///
-void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
intptr_t Disp /* = 0 */,
intptr_t PCAdj /* = 0 */,
bool NeedStub /* = false */,
@@ -177,7 +195,8 @@ void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
/// emitExternalSymbolAddress - Arrange for the address of an external symbol to
/// be emitted to the current location in the function, and allow it to be PC
/// relative.
-void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
intptr_t RelocCST = (Reloc == X86::reloc_picrel_word) ? PICBaseOffset : 0;
MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
Reloc, ES, RelocCST));
@@ -190,7 +209,8 @@ void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
/// emitConstPoolAddress - Arrange for the address of an constant pool
/// to be emitted to the current location in the function, and allow it to be PC
/// relative.
-void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
intptr_t Disp /* = 0 */,
intptr_t PCAdj /* = 0 */) {
intptr_t RelocCST = 0;
@@ -210,7 +230,8 @@ void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
/// emitJumpTableAddress - Arrange for the address of a jump table to
/// be emitted to the current location in the function, and allow it to be PC
/// relative.
-void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
intptr_t PCAdj /* = 0 */) {
intptr_t RelocCST = 0;
if (Reloc == X86::reloc_picrel_word)
@@ -226,7 +247,8 @@ void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
MCE.emitWordLE(0);
}
-unsigned Emitter::getX86RegNum(unsigned RegNo) const {
+template< class machineCodeEmitter>
+unsigned Emitter<machineCodeEmitter>::getX86RegNum(unsigned RegNo) const {
return II->getRegisterInfo().getX86RegNum(RegNo);
}
@@ -236,20 +258,24 @@ inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
return RM | (RegOpcode << 3) | (Mod << 6);
}
-void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
}
-void Emitter::emitRegModRMByte(unsigned RegOpcodeFld) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitRegModRMByte(unsigned RegOpcodeFld) {
MCE.emitByte(ModRMByte(3, RegOpcodeFld, 0));
}
-void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
// SIB byte is in the same format as the ModRMByte...
MCE.emitByte(ModRMByte(SS, Index, Base));
}
-void Emitter::emitConstant(uint64_t Val, unsigned Size) {
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitConstant(uint64_t Val, unsigned Size) {
// Output the constant in little endian byte order...
for (unsigned i = 0; i != Size; ++i) {
MCE.emitByte(Val & 255);
@@ -263,14 +289,16 @@ static bool isDisp8(int Value) {
return Value == (signed char)Value;
}
-bool Emitter::gvNeedsNonLazyPtr(const GlobalValue *GV) {
+template< class machineCodeEmitter>
+bool Emitter<machineCodeEmitter>::gvNeedsNonLazyPtr(const GlobalValue *GV) {
// For Darwin, simulate the linktime GOT by using the same non-lazy-pointer
// mechanism as 32-bit mode.
return (!Is64BitMode || TM.getSubtarget<X86Subtarget>().isTargetDarwin()) &&
TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false);
}
-void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitDisplacementField(const MachineOperand *RelocOp,
int DispVal, intptr_t PCAdj) {
// If this is a simple integer displacement that doesn't require a relocation,
// emit it now.
@@ -304,7 +332,8 @@ void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
}
}
-void Emitter::emitMemModRMByte(const MachineInstr &MI,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitMemModRMByte(const MachineInstr &MI,
unsigned Op, unsigned RegOpcodeField,
intptr_t PCAdj) {
const MachineOperand &Op3 = MI.getOperand(Op+3);
@@ -421,7 +450,9 @@ void Emitter::emitMemModRMByte(const MachineInstr &MI,
}
}
-void Emitter::emitInstruction(const MachineInstr &MI,
+template< class machineCodeEmitter>
+void Emitter<machineCodeEmitter>::emitInstruction(
+ const MachineInstr &MI,
const TargetInstrDesc *Desc) {
DOUT << MI;
@@ -773,3 +804,4 @@ void Emitter::emitInstruction(const MachineInstr &MI,
abort();
}
}
+
diff --git a/lib/Target/X86/X86JITInfo.cpp b/lib/Target/X86/X86JITInfo.cpp
index 4bbccf3..f923106 100644
--- a/lib/Target/X86/X86JITInfo.cpp
+++ b/lib/Target/X86/X86JITInfo.cpp
@@ -16,7 +16,6 @@
#include "X86Relocations.h"
#include "X86Subtarget.h"
#include "llvm/Function.h"
-#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/Config/alloca.h"
#include "llvm/Support/Compiler.h"
#include <cstdlib>
@@ -430,20 +429,20 @@ X86JITInfo::getLazyResolverFunction(JITCompilerFn F) {
}
void *X86JITInfo::emitGlobalValueIndirectSym(const GlobalValue* GV, void *ptr,
- MachineCodeEmitter &MCE) {
+ JITCodeEmitter &JCE) {
#if defined (X86_64_JIT)
- MCE.startGVStub(GV, 8, 8);
- MCE.emitWordLE((unsigned)(intptr_t)ptr);
- MCE.emitWordLE((unsigned)(((intptr_t)ptr) >> 32));
+ JCE.startGVStub(GV, 8, 8);
+ JCE.emitWordLE((unsigned)(intptr_t)ptr);
+ JCE.emitWordLE((unsigned)(((intptr_t)ptr) >> 32));
#else
- MCE.startGVStub(GV, 4, 4);
- MCE.emitWordLE((intptr_t)ptr);
+ JCE.startGVStub(GV, 4, 4);
+ JCE.emitWordLE((intptr_t)ptr);
#endif
- return MCE.finishGVStub(GV);
+ return JCE.finishGVStub(GV);
}
void *X86JITInfo::emitFunctionStub(const Function* F, void *Fn,
- MachineCodeEmitter &MCE) {
+ JITCodeEmitter &JCE) {
// Note, we cast to intptr_t here to silence a -pedantic warning that
// complains about casting a function pointer to a normal pointer.
#if defined (X86_32_JIT) && !defined (_MSC_VER)
@@ -454,55 +453,55 @@ void *X86JITInfo::emitFunctionStub(const Function* F, void *Fn,
#endif
if (NotCC) {
#if defined (X86_64_JIT)
- MCE.startGVStub(F, 13, 4);
- MCE.emitByte(0x49); // REX prefix
- MCE.emitByte(0xB8+2); // movabsq r10
- MCE.emitWordLE((unsigned)(intptr_t)Fn);
- MCE.emitWordLE((unsigned)(((intptr_t)Fn) >> 32));
- MCE.emitByte(0x41); // REX prefix
- MCE.emitByte(0xFF); // jmpq *r10
- MCE.emitByte(2 | (4 << 3) | (3 << 6));
+ JCE.startGVStub(F, 13, 4);
+ JCE.emitByte(0x49); // REX prefix
+ JCE.emitByte(0xB8+2); // movabsq r10
+ JCE.emitWordLE((unsigned)(intptr_t)Fn);
+ JCE.emitWordLE((unsigned)(((intptr_t)Fn) >> 32));
+ JCE.emitByte(0x41); // REX prefix
+ JCE.emitByte(0xFF); // jmpq *r10
+ JCE.emitByte(2 | (4 << 3) | (3 << 6));
#else
- MCE.startGVStub(F, 5, 4);
- MCE.emitByte(0xE9);
- MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
+ JCE.startGVStub(F, 5, 4);
+ JCE.emitByte(0xE9);
+ JCE.emitWordLE((intptr_t)Fn-JCE.getCurrentPCValue()-4);
#endif
- return MCE.finishGVStub(F);
+ return JCE.finishGVStub(F);
}
#if defined (X86_64_JIT)
- MCE.startGVStub(F, 14, 4);
- MCE.emitByte(0x49); // REX prefix
- MCE.emitByte(0xB8+2); // movabsq r10
- MCE.emitWordLE((unsigned)(intptr_t)Fn);
- MCE.emitWordLE((unsigned)(((intptr_t)Fn) >> 32));
- MCE.emitByte(0x41); // REX prefix
- MCE.emitByte(0xFF); // callq *r10
- MCE.emitByte(2 | (2 << 3) | (3 << 6));
+ JCE.startGVStub(F, 14, 4);
+ JCE.emitByte(0x49); // REX prefix
+ JCE.emitByte(0xB8+2); // movabsq r10
+ JCE.emitWordLE((unsigned)(intptr_t)Fn);
+ JCE.emitWordLE((unsigned)(((intptr_t)Fn) >> 32));
+ JCE.emitByte(0x41); // REX prefix
+ JCE.emitByte(0xFF); // callq *r10
+ JCE.emitByte(2 | (2 << 3) | (3 << 6));
#else
- MCE.startGVStub(F, 6, 4);
- MCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
+ JCE.startGVStub(F, 6, 4);
+ JCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
- MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
+ JCE.emitWordLE((intptr_t)Fn-JCE.getCurrentPCValue()-4);
#endif
- MCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
- return MCE.finishGVStub(F);
+ JCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
+ return JCE.finishGVStub(F);
}
void X86JITInfo::emitFunctionStubAtAddr(const Function* F, void *Fn, void *Stub,
- MachineCodeEmitter &MCE) {
+ JITCodeEmitter &JCE) {
// Note, we cast to intptr_t here to silence a -pedantic warning that
// complains about casting a function pointer to a normal pointer.
- MCE.startGVStub(F, Stub, 5);
- MCE.emitByte(0xE9);
+ JCE.startGVStub(F, Stub, 5);
+ JCE.emitByte(0xE9);
#if defined (X86_64_JIT)
- assert(((((intptr_t)Fn-MCE.getCurrentPCValue()-5) << 32) >> 32) ==
- ((intptr_t)Fn-MCE.getCurrentPCValue()-5)
+ assert(((((intptr_t)Fn-JCE.getCurrentPCValue()-5) << 32) >> 32) ==
+ ((intptr_t)Fn-JCE.getCurrentPCValue()-5)
&& "PIC displacement does not fit in displacement field!");
#endif
- MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
- MCE.finishGVStub(F);
+ JCE.emitWordLE((intptr_t)Fn-JCE.getCurrentPCValue()-4);
+ JCE.finishGVStub(F);
}
/// getPICJumpTableEntry - Returns the value of the jumptable entry for the
diff --git a/lib/Target/X86/X86JITInfo.h b/lib/Target/X86/X86JITInfo.h
index 9affa31..6a4e214 100644
--- a/lib/Target/X86/X86JITInfo.h
+++ b/lib/Target/X86/X86JITInfo.h
@@ -15,6 +15,7 @@
#define X86JITINFO_H
#include "llvm/Function.h"
+#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/Target/TargetJITInfo.h"
namespace llvm {
@@ -37,23 +38,23 @@ namespace llvm {
///
virtual void replaceMachineCodeForFunction(void *Old, void *New);
- /// emitGlobalValueIndirectSym - Use the specified MachineCodeEmitter object
+ /// emitGlobalValueIndirectSym - Use the specified JITCodeEmitter object
/// to emit an indirect symbol which contains the address of the specified
/// ptr.
virtual void *emitGlobalValueIndirectSym(const GlobalValue* GV, void *ptr,
- MachineCodeEmitter &MCE);
+ JITCodeEmitter &JCE);
- /// emitFunctionStub - Use the specified MachineCodeEmitter object to emit a
+ /// emitFunctionStub - Use the specified JITCodeEmitter object to emit a
/// small native function that simply calls the function at the specified
/// address.
virtual void *emitFunctionStub(const Function* F, void *Fn,
- MachineCodeEmitter &MCE);
+ JITCodeEmitter &JCE);
- /// emitFunctionStubAtAddr - Use the specified MachineCodeEmitter object to
+ /// emitFunctionStubAtAddr - Use the specified JITCodeEmitter object to
/// emit a small native function that simply calls Fn. Emit the stub into
/// the supplied buffer.
virtual void emitFunctionStubAtAddr(const Function* F, void *Fn,
- void *Buffer, MachineCodeEmitter &MCE);
+ void *Buffer, JITCodeEmitter &JCE);
/// getPICJumpTableEntry - Returns the value of the jumptable entry for the
/// specific basic block.
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 761d098..d4673b0 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -248,6 +248,35 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
return false;
}
+bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ bool DumpAsm, JITCodeEmitter &JCE) {
+ // FIXME: Move this to TargetJITInfo!
+ // On Darwin, do not override 64-bit setting made in X86TargetMachine().
+ if (DefRelocModel == Reloc::Default &&
+ (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit()))
+ setRelocationModel(Reloc::Static);
+
+ // 64-bit JIT places everything in the same buffer except external functions.
+ // On Darwin, use small code model but hack the call instruction for
+ // externals. Elsewhere, do not assume globals are in the lower 4G.
+ if (Subtarget.is64Bit()) {
+ if (Subtarget.isTargetDarwin())
+ setCodeModel(CodeModel::Small);
+ else
+ setCodeModel(CodeModel::Large);
+ }
+
+ PM.add(createX86JITCodeEmitterPass(*this, JCE));
+ if (DumpAsm) {
+ assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+ if (AsmPrinterCtor)
+ PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
+ }
+
+ return false;
+}
+
bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
@@ -262,6 +291,20 @@ bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
return false;
}
+bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ bool DumpAsm,
+ JITCodeEmitter &JCE) {
+ PM.add(createX86JITCodeEmitterPass(*this, JCE));
+ if (DumpAsm) {
+ assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+ if (AsmPrinterCtor)
+ PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
+ }
+
+ return false;
+}
+
/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
/// RIP-relative on this machine, taking into consideration the relocation
/// model and subtarget. RIP-relative addresses cannot have a separate
diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h
index c25fc1d..ecc1d39 100644
--- a/lib/Target/X86/X86TargetMachine.h
+++ b/lib/Target/X86/X86TargetMachine.h
@@ -83,9 +83,14 @@ public:
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
+ virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
+ bool DumpAsm, JITCodeEmitter &JCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
+ virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ bool DumpAsm, JITCodeEmitter &JCE);
/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
/// RIP-relative on this machine, taking into consideration the relocation