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| author | Eric Christopher <echristo@gmail.com> | 2013-02-13 06:01:05 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2013-02-13 06:01:05 +0000 |
| commit | 23571f4f2c895d60c9ed23b831f988b49a55478e (patch) | |
| tree | 01ddae51fd2569a50a4e1ffd6b4a477c7e913c6d /lib/Target/X86 | |
| parent | a4e869405385c00525e35b13cfb6f3840af13ed4 (diff) | |
| download | external_llvm-23571f4f2c895d60c9ed23b831f988b49a55478e.zip external_llvm-23571f4f2c895d60c9ed23b831f988b49a55478e.tar.gz external_llvm-23571f4f2c895d60c9ed23b831f988b49a55478e.tar.bz2 | |
Check i1 as well as i8 variables for 8 bit registers for x86 inline
assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175036 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index c24d41b..bc29df49 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -18135,7 +18135,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, // really want an 8-bit or 32-bit register, map to the appropriate register // class and return the appropriate register. if (Res.second == &X86::GR16RegClass) { - if (VT == MVT::i8) { + if (VT == MVT::i8 || VT == MVT::i1) { unsigned DestReg = 0; switch (Res.first) { default: break; |