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| author | Evan Cheng <evan.cheng@apple.com> | 2007-07-31 06:21:44 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-07-31 06:21:44 +0000 |
| commit | 4ebcc8c2f8f91230066198cd9919766d9e8a4ef1 (patch) | |
| tree | 09eb925fadc9e72ea448817e2b98db194ab7b055 /lib/Target/X86 | |
| parent | 6240ab502275644e5f2740cc395b6e92219a3f42 (diff) | |
| download | external_llvm-4ebcc8c2f8f91230066198cd9919766d9e8a4ef1.zip external_llvm-4ebcc8c2f8f91230066198cd9919766d9e8a4ef1.tar.gz external_llvm-4ebcc8c2f8f91230066198cd9919766d9e8a4ef1.tar.bz2 | |
This isn't safe when there are uses of load's chain result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40617 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 9ce1fa9..939ddf8 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3010,17 +3010,10 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) { // Use two pinsrw instructions to insert a 32 bit value. Idx <<= 1; if (MVT::isFloatingPoint(N1.getValueType())) { - if (ISD::isNON_EXTLoad(N1.Val)) { - // Just load directly from f32mem to GR32. - LoadSDNode *LD = cast<LoadSDNode>(N1); - N1 = DAG.getLoad(MVT::i32, LD->getChain(), LD->getBasePtr(), - LD->getSrcValue(), LD->getSrcValueOffset()); - } else { - N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, N1); - N1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, N1); - N1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i32, N1, - DAG.getConstant(0, getPointerTy())); - } + N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, N1); + N1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, N1); + N1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i32, N1, + DAG.getConstant(0, getPointerTy())); } N0 = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, N0); N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1, |