diff options
author | Dan Gohman <gohman@apple.com> | 2008-09-26 21:54:37 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2008-09-26 21:54:37 +0000 |
commit | 7810bfed5570c192e0714a8fd0e5130a0c38dd2e (patch) | |
tree | 177764949e61ffb42778625fec8fe132db8a6b77 /lib/Target/X86 | |
parent | f2752503336b4070038a5d1727c5e6fc60cd24d2 (diff) | |
download | external_llvm-7810bfed5570c192e0714a8fd0e5130a0c38dd2e.zip external_llvm-7810bfed5570c192e0714a8fd0e5130a0c38dd2e.tar.gz external_llvm-7810bfed5570c192e0714a8fd0e5130a0c38dd2e.tar.bz2 |
Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
-rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 6 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 9fe19ab..56bffab 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -775,7 +775,7 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM, // RIP relative addressing: %rip + 32-bit displacement! if (AM.isRIPRel) { if (!AM.ES && AM.JT != -1 && N.getOpcode() == ISD::Constant) { - int64_t Val = cast<ConstantSDNode>(N)->getSignExtended(); + int64_t Val = cast<ConstantSDNode>(N)->getSExtValue(); if (isInt32(AM.Disp + Val)) { AM.Disp += Val; return false; @@ -790,7 +790,7 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM, switch (N.getOpcode()) { default: break; case ISD::Constant: { - int64_t Val = cast<ConstantSDNode>(N)->getSignExtended(); + int64_t Val = cast<ConstantSDNode>(N)->getSExtValue(); if (isInt32(AM.Disp + Val)) { AM.Disp += Val; return false; @@ -952,7 +952,7 @@ DOUT << "AlreadySelected " << AlreadySelected << "\n"; // Address could not have picked a GV address for the displacement. AM.GV == NULL && // On x86-64, the resultant disp must fit in 32-bits. - isInt32(AM.Disp + CN->getSignExtended()) && + isInt32(AM.Disp + CN->getSExtValue()) && // Check to see if the LHS & C is zero. CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getAPIntValue())) { AM.Disp += CN->getZExtValue(); diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index d8d5db9..1ef644d 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5019,7 +5019,7 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) { bool IllegalFPCMov = false; if (VT.isFloatingPoint() && !VT.isVector() && !isScalarFPTypeInSSEReg(VT)) // FPStack? - IllegalFPCMov = !hasFPCMov(cast<ConstantSDNode>(CC)->getSignExtended()); + IllegalFPCMov = !hasFPCMov(cast<ConstantSDNode>(CC)->getSExtValue()); if ((Opc == X86ISD::CMP || Opc == X86ISD::COMI || |