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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-08-24 01:16:15 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2010-08-24 01:16:15 +0000 |
| commit | 8878e21fe6ba26b0eb83bcd47ab07cff175141e2 (patch) | |
| tree | d4e584cd2e1671f6cdc7c7e581fa647a4d90aa65 /lib/Target/X86 | |
| parent | 5e7044bd0e3921c166d3604d12695e10782913c4 (diff) | |
| download | external_llvm-8878e21fe6ba26b0eb83bcd47ab07cff175141e2.zip external_llvm-8878e21fe6ba26b0eb83bcd47ab07cff175141e2.tar.gz external_llvm-8878e21fe6ba26b0eb83bcd47ab07cff175141e2.tar.bz2 | |
Use pshufhw and pshuflw in more cases and fix getTargetShuffleNode number of arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111890 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 16 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 4 |
2 files changed, 18 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index e72b960..e186058 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2559,7 +2559,7 @@ X86TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo) const { //===----------------------------------------------------------------------===// static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, - SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { + SDValue V1, unsigned TargetMask, SelectionDAG &DAG) { switch(Opc) { default: llvm_unreachable("Unknown x86 shuffle node"); @@ -4285,7 +4285,7 @@ X86TargetLowering::LowerVECTOR_SHUFFLEv8i16(SDValue Op, TargetMask = pshufhw ? X86::getShufflePSHUFHWImmediate(NewV.getNode()): X86::getShufflePSHUFLWImmediate(NewV.getNode()); V1 = NewV.getOperand(0); - return getTargetShuffleNode(Opc, dl, MVT::v8i16, V1, V1, TargetMask, DAG); + return getTargetShuffleNode(Opc, dl, MVT::v8i16, V1, TargetMask, DAG); } } @@ -4359,6 +4359,12 @@ X86TargetLowering::LowerVECTOR_SHUFFLEv8i16(SDValue Op, MaskV.push_back(i); NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV, DAG.getUNDEF(MVT::v8i16), &MaskV[0]); + + if (NewV.getOpcode() == ISD::VECTOR_SHUFFLE && Subtarget->hasSSSE3()) + NewV = getTargetShuffleNode(X86ISD::PSHUFLW, dl, MVT::v8i16, + NewV.getOperand(0), + X86::getShufflePSHUFLWImmediate(NewV.getNode()), + DAG); } // If BestHi >= 0, generate a pshufhw to put the high elements in order, @@ -4381,6 +4387,12 @@ X86TargetLowering::LowerVECTOR_SHUFFLEv8i16(SDValue Op, } NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV, DAG.getUNDEF(MVT::v8i16), &MaskV[0]); + + if (NewV.getOpcode() == ISD::VECTOR_SHUFFLE && Subtarget->hasSSSE3()) + NewV = getTargetShuffleNode(X86ISD::PSHUFHW, dl, MVT::v8i16, + NewV.getOperand(0), + X86::getShufflePSHUFHWImmediate(NewV.getNode()), + DAG); } // In case BestHi & BestLo were both -1, which means each quadword has a word diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 5949a38..d9e7b40 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -5890,12 +5890,16 @@ def : Pat<(v8i16 (X86PShufhwLd addr:$src, (i8 imm:$imm))), (PSHUFHWmi addr:$src, imm:$imm)>; def : Pat<(v8i16 (X86PShufhw VR128:$src, (i8 imm:$imm))), (PSHUFHWri VR128:$src, imm:$imm)>; +def : Pat<(v8i16 (X86PShufhw (bc_v8i16 (memopv2i64 addr:$src)), (i8 imm:$imm))), + (PSHUFHWmi addr:$src, imm:$imm)>; // Shuffle with PSHUFLW def : Pat<(v8i16 (X86PShuflwLd addr:$src, (i8 imm:$imm))), (PSHUFLWmi addr:$src, imm:$imm)>; def : Pat<(v8i16 (X86PShuflw VR128:$src, (i8 imm:$imm))), (PSHUFLWri VR128:$src, imm:$imm)>; +def : Pat<(v8i16 (X86PShuflw (bc_v8i16 (memopv2i64 addr:$src)), (i8 imm:$imm))), + (PSHUFLWmi addr:$src, imm:$imm)>; // Shuffle with PALIGN def : Pat<(v1i64 (X86PAlign VR64:$src1, VR64:$src2, (i8 imm:$imm))), |