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author | Chris Lattner <sabre@nondot.org> | 2010-11-06 19:57:21 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-11-06 19:57:21 +0000 |
commit | 90fd797dc739319347861d4f3984bc8952ae9a29 (patch) | |
tree | 606f6e49e3dc37ec32c49d07519667df46bba585 /lib/Target/X86 | |
parent | 8d5acb7007decaf0c30bf4a3d4c55e5cc2cce0a7 (diff) | |
download | external_llvm-90fd797dc739319347861d4f3984bc8952ae9a29.zip external_llvm-90fd797dc739319347861d4f3984bc8952ae9a29.tar.gz external_llvm-90fd797dc739319347861d4f3984bc8952ae9a29.tar.bz2 |
add (and document) the ability for alias results to have
fixed physical registers. Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118352 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
-rw-r--r-- | lib/Target/X86/AsmParser/X86AsmParser.cpp | 16 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 13 |
2 files changed, 16 insertions, 13 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 9ab6b56..eaa69f1 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -821,7 +821,7 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, // The assembler accepts these instructions with no operand as a synonym for // an instruction acting on st(1). e.g. "fxch" -> "fxch %st(1)". - if ((Name == "fxch" || Name == "fucom" || Name == "fucomp" || + if ((Name == "fxch" || Name == "faddp" || Name == "fsubp" || Name == "fsubrp" || Name == "fmulp" || Name == "fdivp" || Name == "fdivrp") && Operands.size() == 1) { @@ -829,18 +829,6 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, NameLoc, NameLoc)); } - // The assembler accepts these instructions with two few operands as a synonym - // for taking %st(1),%st(0) or X, %st(0). - if ((Name == "fcomi" || Name == "fucomi" || Name == "fucompi" || - Name == "fcompi" ) && - Operands.size() < 3) { - if (Operands.size() == 1) - Operands.push_back(X86Operand::CreateReg(MatchRegisterName("st(1)"), - NameLoc, NameLoc)); - Operands.push_back(X86Operand::CreateReg(MatchRegisterName("st(0)"), - NameLoc, NameLoc)); - } - return false; } @@ -854,6 +842,8 @@ MatchAndEmitInstruction(SMLoc IDLoc, // First, handle aliases that expand to multiple instructions. // FIXME: This should be replaced with a real .td file alias mechanism. + // Also, MatchInstructionImpl should do actually *do* the EmitInstruction + // call. if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw" || Op->getToken() == "fstsww" || Op->getToken() == "fstcww" || Op->getToken() == "finit" || Op->getToken() == "fsave" || diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 7fec014..fdb2983 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -1377,6 +1377,19 @@ def : InstAlias<"clrw $reg", (XOR16rr GR16:$reg, GR16:$reg)>; def : InstAlias<"clrl $reg", (XOR32rr GR32:$reg, GR32:$reg)>; def : InstAlias<"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)>; +// Default arguments for various fp stack instructions. +def : InstAlias<"fucom", (UCOM_Fr ST1)>; +def : InstAlias<"fucomp", (UCOM_FPr ST1)>; +def : InstAlias<"fcomi", (COM_FIr ST1)>; +def : InstAlias<"fcomi $reg", (COM_FIr RST:$reg)>; +def : InstAlias<"fcomip", (COM_FIPr ST1)>; +def : InstAlias<"fcomip $reg", (COM_FIPr RST:$reg)>; +def : InstAlias<"fucomi", (UCOM_FIr ST1)>; +def : InstAlias<"fucomi $reg", (UCOM_FIr RST:$reg)>; +def : InstAlias<"fucomip", (UCOM_FIPr ST1)>; +def : InstAlias<"fucomip $reg", (UCOM_FIPr RST:$reg)>; + + // We accepts "fnstsw %eax" even though it only writes %ax. def : InstAlias<"fnstsw %eax", (FNSTSW8r)>; def : InstAlias<"fnstsw %al" , (FNSTSW8r)>; |