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| author | Misha Brukman <brukman+llvm@gmail.com> | 2004-09-15 01:40:18 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-09-15 01:40:18 +0000 |
| commit | a2700194aed0b9d11a0ebf70e260f7ed70c86213 (patch) | |
| tree | cce03a1bd7d22190cf881383ff03870b1906ee3b /lib/Target/X86 | |
| parent | 3559a93f5e48209ecd3f0b19d91e38f3b24a295b (diff) | |
| download | external_llvm-a2700194aed0b9d11a0ebf70e260f7ed70c86213.zip external_llvm-a2700194aed0b9d11a0ebf70e260f7ed70c86213.tar.gz external_llvm-a2700194aed0b9d11a0ebf70e260f7ed70c86213.tar.bz2 | |
Fit long lines into 80 cols via creative space elimination
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16353 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
| -rw-r--r-- | lib/Target/X86/X86RegisterInfo.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index 701c7da..4262a9f 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -36,10 +36,10 @@ let Namespace = "X86" in { def SI : RegisterGroup<"SI", [ESI]>; def DI : RegisterGroup<"DI", [EDI]>; // 8-bit registers - def AL : RegisterGroup<"AL", [AX, EAX]>; def CL : RegisterGroup<"CL", [CX, ECX]>; - def DL : RegisterGroup<"DL", [DX, EDX]>; def BL : RegisterGroup<"BL", [BX, EBX]>; - def AH : RegisterGroup<"AH", [AX, EAX]>; def CH : RegisterGroup<"CH", [CX, ECX]>; - def DH : RegisterGroup<"DH", [DX, EDX]>; def BH : RegisterGroup<"BH", [BX, EBX]>; + def AL : RegisterGroup<"AL", [AX,EAX]>; def CL : RegisterGroup<"CL",[CX,ECX]>; + def DL : RegisterGroup<"DL", [DX,EDX]>; def BL : RegisterGroup<"BL",[BX,EBX]>; + def AH : RegisterGroup<"AH", [AX,EAX]>; def CH : RegisterGroup<"CH",[CX,ECX]>; + def DH : RegisterGroup<"DH", [DX,EDX]>; def BH : RegisterGroup<"BH",[BX,EBX]>; // Pseudo Floating Point registers def FP0 : Register<"FP0">; def FP1 : Register<"FP1">; |