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author | Bill Wendling <isanbard@gmail.com> | 2013-12-07 09:39:53 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-12-07 09:39:53 +0000 |
commit | d51d36e3f1c83eb183625af2e3988a08bb984cb7 (patch) | |
tree | fd9cf1002de72525abcc266c98ca8f5f3c734ba5 /lib/Target/X86 | |
parent | 2990853ea8bf4888b179ac6c493836b83769e87b (diff) | |
download | external_llvm-d51d36e3f1c83eb183625af2e3988a08bb984cb7.zip external_llvm-d51d36e3f1c83eb183625af2e3988a08bb984cb7.tar.gz external_llvm-d51d36e3f1c83eb183625af2e3988a08bb984cb7.tar.bz2 |
Merging r196391:
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r196391 | hliao | 2013-12-04 09:44:22 -0800 (Wed, 04 Dec 2013) | 5 lines
[X86] Check YMM31/ZMM31 as well
- No test case as there's no calling convention preserve YMM31/ZMM31 only
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196653 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
-rw-r--r-- | lib/Target/X86/X86VZeroUpper.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/X86/X86VZeroUpper.cpp b/lib/Target/X86/X86VZeroUpper.cpp index a944652..66ae9c2 100644 --- a/lib/Target/X86/X86VZeroUpper.cpp +++ b/lib/Target/X86/X86VZeroUpper.cpp @@ -122,11 +122,11 @@ static bool checkFnHasLiveInYmm(MachineRegisterInfo &MRI) { } static bool clobbersAllYmmRegs(const MachineOperand &MO) { - for (unsigned reg = X86::YMM0; reg < X86::YMM31; ++reg) { + for (unsigned reg = X86::YMM0; reg <= X86::YMM31; ++reg) { if (!MO.clobbersPhysReg(reg)) return false; } - for (unsigned reg = X86::ZMM0; reg < X86::ZMM31; ++reg) { + for (unsigned reg = X86::ZMM0; reg <= X86::ZMM31; ++reg) { if (!MO.clobbersPhysReg(reg)) return false; } @@ -155,11 +155,11 @@ static bool clobbersAnyYmmReg(MachineInstr *MI) { const MachineOperand &MO = MI->getOperand(i); if (!MO.isRegMask()) continue; - for (unsigned reg = X86::YMM0; reg < X86::YMM31; ++reg) { + for (unsigned reg = X86::YMM0; reg <= X86::YMM31; ++reg) { if (MO.clobbersPhysReg(reg)) return true; } - for (unsigned reg = X86::ZMM0; reg < X86::ZMM31; ++reg) { + for (unsigned reg = X86::ZMM0; reg <= X86::ZMM31; ++reg) { if (MO.clobbersPhysReg(reg)) return true; } |