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| author | Chris Lattner <sabre@nondot.org> | 2004-04-06 01:48:06 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-04-06 01:48:06 +0000 |
| commit | edd5e4957a46237461b4c7901230efd6b7bc4881 (patch) | |
| tree | a1e077b1e910403dae586469ac1f9f71d3983b18 /lib/Target/X86 | |
| parent | 502e36c3c95c6bf65094ae6a6ca52d7ff4e13d68 (diff) | |
| download | external_llvm-edd5e4957a46237461b4c7901230efd6b7bc4881.zip external_llvm-edd5e4957a46237461b4c7901230efd6b7bc4881.tar.gz external_llvm-edd5e4957a46237461b4c7901230efd6b7bc4881.tar.bz2 | |
Implement negation of longs efficiently. For this testcase:
long %test(long %X) {
%Y = sub long 0, %X
ret long %Y
}
We used to generate:
test:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %ECX, DWORD PTR [%ESP + 8]
mov %ESI, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %EDX, 0
sub %EAX, %ECX
sbb %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
Now we generate:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
neg %EAX
adc %EDX, 0
neg %EDX
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12681 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
| -rw-r--r-- | lib/Target/X86/InstSelectSimple.cpp | 13 | ||||
| -rw-r--r-- | lib/Target/X86/X86ISelSimple.cpp | 13 |
2 files changed, 22 insertions, 4 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 6144b62..d442886 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -1690,14 +1690,23 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB, unsigned Class = getClassB(Op0->getType()); // sub 0, X -> neg X - if (OperatorClass == 1 && Class != cLong) + if (OperatorClass == 1) if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0)) { if (CI->isNullValue()) { unsigned op1Reg = getReg(Op1, MBB, IP); static unsigned const NEGTab[] = { - X86::NEG8r, X86::NEG16r, X86::NEG32r + X86::NEG8r, X86::NEG16r, X86::NEG32r, 0, X86::NEG32r }; BuildMI(*MBB, IP, NEGTab[Class], 1, DestReg).addReg(op1Reg); + + if (Class == cLong) { + // We just emitted: Dl = neg Sl + // Now emit : T = addc Sh, 0 + // : Dh = neg T + unsigned T = makeAnotherReg(Type::IntTy); + BuildMI(*MBB, IP, X86::ADC32ri, 2, T).addReg(op1Reg+1).addImm(0); + BuildMI(*MBB, IP, X86::NEG32r, 1, DestReg+1).addReg(T); + } return; } } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0)) diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index 6144b62..d442886 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -1690,14 +1690,23 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB, unsigned Class = getClassB(Op0->getType()); // sub 0, X -> neg X - if (OperatorClass == 1 && Class != cLong) + if (OperatorClass == 1) if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0)) { if (CI->isNullValue()) { unsigned op1Reg = getReg(Op1, MBB, IP); static unsigned const NEGTab[] = { - X86::NEG8r, X86::NEG16r, X86::NEG32r + X86::NEG8r, X86::NEG16r, X86::NEG32r, 0, X86::NEG32r }; BuildMI(*MBB, IP, NEGTab[Class], 1, DestReg).addReg(op1Reg); + + if (Class == cLong) { + // We just emitted: Dl = neg Sl + // Now emit : T = addc Sh, 0 + // : Dh = neg T + unsigned T = makeAnotherReg(Type::IntTy); + BuildMI(*MBB, IP, X86::ADC32ri, 2, T).addReg(op1Reg+1).addImm(0); + BuildMI(*MBB, IP, X86::NEG32r, 1, DestReg+1).addReg(T); + } return; } } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0)) |