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author | Richard Osborne <richard@xmos.com> | 2008-11-07 10:59:00 +0000 |
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committer | Richard Osborne <richard@xmos.com> | 2008-11-07 10:59:00 +0000 |
commit | b25baef26f03b9909b65dd5f762b38f93000445d (patch) | |
tree | f03bc8e40b55feab99b0f32e4428d215fa45f988 /lib/Target/XCore/XCoreInstrFormats.td | |
parent | 4df60f5491ff35c8a48c2cf14e18a33c9793b3bb (diff) | |
download | external_llvm-b25baef26f03b9909b65dd5f762b38f93000445d.zip external_llvm-b25baef26f03b9909b65dd5f762b38f93000445d.tar.gz external_llvm-b25baef26f03b9909b65dd5f762b38f93000445d.tar.bz2 |
Add XCore backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58838 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore/XCoreInstrFormats.td')
-rw-r--r-- | lib/Target/XCore/XCoreInstrFormats.td | 120 |
1 files changed, 120 insertions, 0 deletions
diff --git a/lib/Target/XCore/XCoreInstrFormats.td b/lib/Target/XCore/XCoreInstrFormats.td new file mode 100644 index 0000000..8002c99 --- /dev/null +++ b/lib/Target/XCore/XCoreInstrFormats.td @@ -0,0 +1,120 @@ +//===- XCoreInstrFormats.td - XCore Instruction Formats ----*- tablegen -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// Instruction format superclass +//===----------------------------------------------------------------------===// +class InstXCore<dag outs, dag ins, string asmstr, list<dag> pattern> + : Instruction { + field bits<32> Inst; + + let Namespace = "XCore"; + dag OutOperandList = outs; + dag InOperandList = ins; + let AsmString = asmstr; + let Pattern = pattern; +} + +// XCore pseudo instructions format +class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern>; + +//===----------------------------------------------------------------------===// +// Instruction formats +//===----------------------------------------------------------------------===// + +class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FU6<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FLU6<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FU10<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FLU10<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _F2R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FRUS<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _FL2R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _F1R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _F0R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _L5R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} + +class _L6R<dag outs, dag ins, string asmstr, list<dag> pattern> + : InstXCore<outs, ins, asmstr, pattern> { + let Inst{31-0} = 0; +} |