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| author | Richard Osborne <richard@xmos.com> | 2012-12-17 13:20:37 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2012-12-17 13:20:37 +0000 |
| commit | ff6114e872742e966c57202add83b84611e63e97 (patch) | |
| tree | 55c6edaec782b61f59c1965b8a983e3a3a12cfcf /lib/Target/XCore/XCoreInstrInfo.td | |
| parent | 5c531eb8b121b83ad14ac5cf94c8fd9c50ef6f5b (diff) | |
| download | external_llvm-ff6114e872742e966c57202add83b84611e63e97.zip external_llvm-ff6114e872742e966c57202add83b84611e63e97.tar.gz external_llvm-ff6114e872742e966c57202add83b84611e63e97.tar.bz2 | |
Add instruction encodings for ZEXT and SEXT.
Previously these were marked with the wrong format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170327 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore/XCoreInstrInfo.td')
| -rw-r--r-- | lib/Target/XCore/XCoreInstrInfo.td | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index b69f7de..1aeff40 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -764,20 +764,20 @@ def SEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2), [(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1, immBitp:$src2))]>; -def SEXT_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2), - "sext $dst, $src2", - [(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1, - GRRegs:$src2))]>; +def SEXT_2r : + _F2RSrcDst<0b001100, (outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2), + "sext $dst, $src2", + [(set GRRegs:$dst, (int_xcore_sext GRRegs:$src1, GRRegs:$src2))]>; def ZEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2), "zext $dst, $src2", [(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1, immBitp:$src2))]>; -def ZEXT_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src2, GRRegs:$src1), - "zext $dst, $src2", - [(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1, - GRRegs:$src2))]>; +def ZEXT_2r : + _F2RSrcDst<0b010000, (outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2), + "zext $dst, $src2", + [(set GRRegs:$dst, (int_xcore_zext GRRegs:$src1, GRRegs:$src2))]>; def ANDNOT_2r : _F2RSrcDst<0b001010, (outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2), |