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authorRobert Lytton <robert@xmos.com>2013-09-18 12:43:35 +0000
committerRobert Lytton <robert@xmos.com>2013-09-18 12:43:35 +0000
commitd072d1b2a36f6c6e1b4b513dc69e91b61ad8c21a (patch)
tree352624eb2bc4107396f55510201c2acbd682aebe /lib/Target/XCore/XCoreTargetMachine.cpp
parentaf96481135473f8da6de06f5ad18c09bd376a50f (diff)
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Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers.
XCore target: Add XCoreTargetTransformInfo This is where getNumberOfRegisters() resides, which in turn returns the number of vector registers (=0). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190936 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore/XCoreTargetMachine.cpp')
-rw-r--r--lib/Target/XCore/XCoreTargetMachine.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/XCore/XCoreTargetMachine.cpp b/lib/Target/XCore/XCoreTargetMachine.cpp
index 3ef1520..9ae0b86 100644
--- a/lib/Target/XCore/XCoreTargetMachine.cpp
+++ b/lib/Target/XCore/XCoreTargetMachine.cpp
@@ -70,3 +70,11 @@ bool XCorePassConfig::addInstSelector() {
extern "C" void LLVMInitializeXCoreTarget() {
RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
}
+
+void XCoreTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
+ // Add first the target-independent BasicTTI pass, then our XCore pass. This
+ // allows the XCore pass to delegate to the target independent layer when
+ // appropriate.
+ PM.add(createBasicTargetTransformInfoPass(this));
+ PM.add(createXCoreTargetTransformInfoPass(this));
+}