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| author | Chad Rosier <mcrosier@apple.com> | 2013-06-22 18:37:38 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2013-06-22 18:37:38 +0000 |
| commit | 5b3fca50a08865f0db55fc92ad1c037a04e12177 (patch) | |
| tree | 998e3b634ae4bbd2829c36ff98b0fa70e3cda198 /lib/Target/XCore | |
| parent | 5729b8ea01739cf9b1171f0a4349275bc8124756 (diff) | |
| download | external_llvm-5b3fca50a08865f0db55fc92ad1c037a04e12177.zip external_llvm-5b3fca50a08865f0db55fc92ad1c037a04e12177.tar.gz external_llvm-5b3fca50a08865f0db55fc92ad1c037a04e12177.tar.bz2 | |
The getRegForInlineAsmConstraint function should only accept MVT value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore')
| -rw-r--r-- | lib/Target/XCore/XCoreISelLowering.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/XCore/XCoreISelLowering.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index 7b89b1a..5af2c9c 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -1582,7 +1582,7 @@ XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, std::pair<unsigned, const TargetRegisterClass*> XCoreTargetLowering:: getRegForInlineAsmConstraint(const std::string &Constraint, - EVT VT) const { + MVT VT) const { if (Constraint.size() == 1) { switch (Constraint[0]) { default : break; diff --git a/lib/Target/XCore/XCoreISelLowering.h b/lib/Target/XCore/XCoreISelLowering.h index f765f02..7761b7c 100644 --- a/lib/Target/XCore/XCoreISelLowering.h +++ b/lib/Target/XCore/XCoreISelLowering.h @@ -158,7 +158,7 @@ namespace llvm { // Inline asm support std::pair<unsigned, const TargetRegisterClass*> getRegForInlineAsmConstraint(const std::string &Constraint, - EVT VT) const; + MVT VT) const; // Expand specifics SDValue TryExpandADDWithMul(SDNode *Op, SelectionDAG &DAG) const; |