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author | Evan Cheng <evan.cheng@apple.com> | 2011-07-08 01:53:10 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-08 01:53:10 +0000 |
commit | ebdeeab812beec0385b445f3d4c41a114e0d972f (patch) | |
tree | 20eaafc6f227ca94201b0b6ac02d94b06b608229 /lib/Target/XCore | |
parent | 1fb0955cab05ff71f5bbad523b0374db3b08b201 (diff) | |
download | external_llvm-ebdeeab812beec0385b445f3d4c41a114e0d972f.zip external_llvm-ebdeeab812beec0385b445f3d4c41a114e0d972f.tar.gz external_llvm-ebdeeab812beec0385b445f3d4c41a114e0d972f.tar.bz2 |
Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
to generate asm matcher subtarget feature queries. e.g.
"ModeThumb,FeatureThumb2" is translated to
"(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore')
-rw-r--r-- | lib/Target/XCore/XCoreSubtarget.cpp | 3 | ||||
-rw-r--r-- | lib/Target/XCore/XCoreTargetMachine.cpp | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/XCore/XCoreSubtarget.cpp b/lib/Target/XCore/XCoreSubtarget.cpp index c727183..7d8fe8a 100644 --- a/lib/Target/XCore/XCoreSubtarget.cpp +++ b/lib/Target/XCore/XCoreSubtarget.cpp @@ -14,9 +14,10 @@ #include "XCoreSubtarget.h" #include "XCore.h" -#define GET_SUBTARGETINFO_CTOR +#define GET_SUBTARGETINFO_ENUM #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC +#define GET_SUBTARGETINFO_CTOR #include "XCoreGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/XCore/XCoreTargetMachine.cpp b/lib/Target/XCore/XCoreTargetMachine.cpp index 542038b..f2bea33 100644 --- a/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/lib/Target/XCore/XCoreTargetMachine.cpp @@ -23,7 +23,7 @@ using namespace llvm; XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT, const std::string &CPU, const std::string &FS) - : LLVMTargetMachine(T, TT), + : LLVMTargetMachine(T, TT, CPU, FS), Subtarget(TT, CPU, FS), DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-" "i16:16:32-i32:32:32-i64:32:32-n32"), |