wire up 64-bit MCCodeEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95438 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 17 insertions, 9 deletions

diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index e39551b..1d17a05 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -50,7 +50,8 @@ FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
                                           JITCodeEmitter &JCE);
 
 MCCodeEmitter *createHeinousX86MCCodeEmitter(const Target &, TargetMachine &TM);
-MCCodeEmitter *createX86MCCodeEmitter(const Target &, TargetMachine &TM);
+MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM);
+MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM);
 
 /// createX86EmitCodeToMemory - Returns a pass that converts a register
 /// allocated function into raw machine code in a dynamically
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index dbb83c8..480c0cd 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -1117,8 +1117,11 @@ MCCodeEmitter *llvm::createHeinousX86MCCodeEmitter(const Target &T,
                                                    TargetMachine &TM) {
   
   // FIXME: Remove the heinous one when the new one works.
-  if (EnableNewEncoder)
-    return createX86MCCodeEmitter(T, TM);
+  if (EnableNewEncoder) {
+    if (TM.getTargetData()->getPointerSize() == 4)
+      return createX86_32MCCodeEmitter(T, TM);
+    return createX86_64MCCodeEmitter(T, TM);
+  }
 
   return new X86MCCodeEmitter(static_cast<X86TargetMachine&>(TM));
 }
diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp
index 4061b9c..46d3889 100644
--- a/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -27,10 +27,9 @@ class X86MCCodeEmitter : public MCCodeEmitter {
   const TargetInstrInfo &TII;
   bool Is64BitMode;
 public:
-  X86MCCodeEmitter(TargetMachine &tm) 
+  X86MCCodeEmitter(TargetMachine &tm, bool is64Bit) 
     : TM(tm), TII(*TM.getInstrInfo()) {
-    // FIXME: Get this from the right place.
-    Is64BitMode = false;
+    Is64BitMode = is64Bit;
   }
 
   ~X86MCCodeEmitter() {}
@@ -83,9 +82,14 @@ public:
 } // end anonymous namespace
 
 
-MCCodeEmitter *llvm::createX86MCCodeEmitter(const Target &,
-                                            TargetMachine &TM) {
-  return new X86MCCodeEmitter(TM);
+MCCodeEmitter *llvm::createX86_32MCCodeEmitter(const Target &,
+                                               TargetMachine &TM) {
+  return new X86MCCodeEmitter(TM, false);
+}
+
+MCCodeEmitter *llvm::createX86_64MCCodeEmitter(const Target &,
+                                               TargetMachine &TM) {
+  return new X86MCCodeEmitter(TM, true);
 }