diff options
author | Akira Hatanaka <ahatanaka@mips.com> | 2013-05-13 17:57:42 +0000 |
---|---|---|
committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-05-13 17:57:42 +0000 |
commit | 151687cb8c4fc65fefcd8964a0c3d77680e90a5c (patch) | |
tree | 60132efb6911563157d3a9f21143ea4d189f0ba3 /lib/Target | |
parent | 6daba286836e6fb2351e7ebc248e18a5c80e8a31 (diff) | |
download | external_llvm-151687cb8c4fc65fefcd8964a0c3d77680e90a5c.zip external_llvm-151687cb8c4fc65fefcd8964a0c3d77680e90a5c.tar.gz external_llvm-151687cb8c4fc65fefcd8964a0c3d77680e90a5c.tar.bz2 |
[mips] Define a helper function which creates an instruction with the same
operands as the prototype instruction but with a different opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181714 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.cpp | 13 | ||||
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.h | 6 |
2 files changed, 19 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index 336b62d..3144dae 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -282,3 +282,16 @@ unsigned MipsInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { } } } + +MachineInstrBuilder +MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc, + MachineBasicBlock::iterator I) const { + MachineInstrBuilder MIB; + MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), get(NewOpc)); + + for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J) + MIB.addOperand(I->getOperand(J)); + + MIB.setMemRefs(I->memoperands_begin(), I->memoperands_end()); + return MIB; +} diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index 6a57736..0f075ec 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -17,6 +17,7 @@ #include "Mips.h" #include "MipsAnalyzeImmediate.h" #include "MipsRegisterInfo.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Target/TargetInstrInfo.h" @@ -116,6 +117,11 @@ public: const TargetRegisterInfo *TRI, int64_t Offset) const = 0; + /// Create an instruction which has the same operands and memory operands + /// as MI but has a new opcode. + MachineInstrBuilder genInstrWithNewOpc(unsigned NewOpc, + MachineBasicBlock::iterator I) const; + protected: bool isZeroImm(const MachineOperand &op) const; |