diff options
author | Dan Gohman <gohman@apple.com> | 2008-04-28 17:15:20 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-04-28 17:15:20 +0000 |
commit | 1f13c686df75ddbbe15b208606ece4846d7479a8 (patch) | |
tree | a3562b2ccf01378f4421c755328b783c9dbf9c49 /lib/Target | |
parent | 23e8b715267a64381e2fff8c208da1f24b387b83 (diff) | |
download | external_llvm-1f13c686df75ddbbe15b208606ece4846d7479a8.zip external_llvm-1f13c686df75ddbbe15b208606ece4846d7479a8.tar.gz external_llvm-1f13c686df75ddbbe15b208606ece4846d7479a8.tar.bz2 |
Fix the SVOffset values for loads and stores produced by
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50359 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 13 | ||||
-rw-r--r-- | lib/Target/ARM/ARMISelLowering.h | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 11 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.h | 6 |
4 files changed, 18 insertions, 16 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 6a581f7..dc76b7b 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1247,8 +1247,8 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - const Value *DstSV, uint64_t DstOff, - const Value *SrcSV, uint64_t SrcOff){ + const Value *DstSV, uint64_t DstSVOff, + const Value *SrcSV, uint64_t SrcSVOff){ // Do repeated 4-byte loads and stores. To be improved. // This requires 4-byte alignment. if ((Align & 3) != 0) @@ -1271,6 +1271,7 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, const unsigned MAX_LOADS_IN_LDM = 6; SDOperand TFOps[MAX_LOADS_IN_LDM]; SDOperand Loads[MAX_LOADS_IN_LDM]; + uint64_t SrcOff = 0, DstOff = 0; // Emit up to MAX_LOADS_IN_LDM loads, then a TokenFactor barrier, then the // same number of stores. The loads and stores will get combined into @@ -1281,7 +1282,7 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, Loads[i] = DAG.getLoad(VT, Chain, DAG.getNode(ISD::ADD, MVT::i32, Src, DAG.getConstant(SrcOff, MVT::i32)), - SrcSV, SrcOff); + SrcSV, SrcSVOff + SrcOff); TFOps[i] = Loads[i].getValue(1); SrcOff += VTSize; } @@ -1292,7 +1293,7 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, TFOps[i] = DAG.getStore(Chain, Loads[i], DAG.getNode(ISD::ADD, MVT::i32, Dst, DAG.getConstant(DstOff, MVT::i32)), - DstSV, DstOff); + DstSV, DstSVOff + DstOff); DstOff += VTSize; } Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i); @@ -1318,7 +1319,7 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, Loads[i] = DAG.getLoad(VT, Chain, DAG.getNode(ISD::ADD, MVT::i32, Src, DAG.getConstant(SrcOff, MVT::i32)), - SrcSV, SrcOff); + SrcSV, SrcSVOff + SrcOff); TFOps[i] = Loads[i].getValue(1); ++i; SrcOff += VTSize; @@ -1340,7 +1341,7 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, TFOps[i] = DAG.getStore(Chain, Loads[i], DAG.getNode(ISD::ADD, MVT::i32, Dst, DAG.getConstant(DstOff, MVT::i32)), - DstSV, DstOff); + DstSV, DstSVOff + DstOff); ++i; DstOff += VTSize; BytesLeft -= VTSize; diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h index 13f5c08..ce6d5fe 100644 --- a/lib/Target/ARM/ARMISelLowering.h +++ b/lib/Target/ARM/ARMISelLowering.h @@ -149,8 +149,8 @@ namespace llvm { SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - const Value *DstSV, uint64_t DstOff, - const Value *SrcSV, uint64_t SrcOff); + const Value *DstSV, uint64_t DstSVOff, + const Value *SrcSV, uint64_t SrcSVOff); }; } diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index c0ba4d1..799ba00 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4763,7 +4763,7 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, SDOperand Chain, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, - const Value *DstSV, uint64_t DstOff) { + const Value *DstSV, uint64_t DstSVOff) { ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); /// If not DWORD aligned or size is more than the threshold, call the library. @@ -4890,7 +4890,7 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, DAG.getConstant(Offset, AddrVT)), Src, DAG.getConstant(BytesLeft, SizeVT), - Align, DstSV, 0); + Align, DstSV, DstSVOff + Offset); } // TODO: Use a Tokenfactor, as in memcpy, instead of a single chain. @@ -4903,8 +4903,8 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - const Value *DstSV, uint64_t DstOff, - const Value *SrcSV, uint64_t SrcOff){ + const Value *DstSV, uint64_t DstSVOff, + const Value *SrcSV, uint64_t SrcSVOff){ // This requires the copy size to be a constant, preferrably // within a subtarget-specific limit. @@ -4964,7 +4964,8 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DAG.getConstant(Offset, SrcVT)), DAG.getConstant(BytesLeft, SizeVT), Align, AlwaysInline, - DstSV, 0, SrcSV, 0)); + DstSV, DstSVOff + Offset, + SrcSV, SrcSVOff + Offset)); } return DAG.getNode(ISD::TokenFactor, MVT::Other, &Results[0], Results.size()); diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index 6b02f33..987cf73 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -538,14 +538,14 @@ namespace llvm { SDOperand Chain, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, - const Value *DstSV, uint64_t DstOff); + const Value *DstSV, uint64_t DstSVOff); SDOperand EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDOperand Chain, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - const Value *DstSV, uint64_t DstOff, - const Value *SrcSV, uint64_t SrcOff); + const Value *DstSV, uint64_t DstSVOff, + const Value *SrcSV, uint64_t SrcSVOff); }; } |