diff options
author | Owen Anderson <resistor@mac.com> | 2010-08-06 00:23:35 +0000 |
---|---|---|
committer | Owen Anderson <resistor@mac.com> | 2010-08-06 00:23:35 +0000 |
commit | 1f74590e9d1b9cf0f1f81a156efea73f76546e05 (patch) | |
tree | f3b2fa6368e824b1dd3ad04e8c1c4f070b4bb4a0 /lib/Target | |
parent | f6d6df40060eef9af19b084b2fb7a8fd627415ae (diff) | |
download | external_llvm-1f74590e9d1b9cf0f1f81a156efea73f76546e05.zip external_llvm-1f74590e9d1b9cf0f1f81a156efea73f76546e05.tar.gz external_llvm-1f74590e9d1b9cf0f1f81a156efea73f76546e05.tar.bz2 |
Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
31 files changed, 36 insertions, 36 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 089d1c5..93f617d 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -65,7 +65,7 @@ namespace { static char ID; public: ARMCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce) - : MachineFunctionPass(ID), JTI(0), + : MachineFunctionPass(&ID), JTI(0), II((const ARMInstrInfo *)tm.getInstrInfo()), TD(tm.getTargetData()), TM(tm), MCE(mce), MCPEs(0), MJTEs(0), diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index 118b2de..63d57b6 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -173,7 +173,7 @@ namespace { bool isThumb2; public: static char ID; - ARMConstantIslands() : MachineFunctionPass(ID) {} + ARMConstantIslands() : MachineFunctionPass(&ID) {} virtual bool runOnMachineFunction(MachineFunction &MF); diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp index e5f8a63..70ed677 100644 --- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -26,7 +26,7 @@ namespace { class ARMExpandPseudo : public MachineFunctionPass { public: static char ID; - ARMExpandPseudo() : MachineFunctionPass(ID) {} + ARMExpandPseudo() : MachineFunctionPass(&ID) {} const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; diff --git a/lib/Target/ARM/ARMGlobalMerge.cpp b/lib/Target/ARM/ARMGlobalMerge.cpp index 85b0c6c..af7298a 100644 --- a/lib/Target/ARM/ARMGlobalMerge.cpp +++ b/lib/Target/ARM/ARMGlobalMerge.cpp @@ -78,7 +78,7 @@ namespace { public: static char ID; // Pass identification, replacement for typeid. explicit ARMGlobalMerge(const TargetLowering *tli) - : FunctionPass(ID), TLI(tli) {} + : FunctionPass(&ID), TLI(tli) {} virtual bool doInitialization(Module &M); virtual bool runOnFunction(Function& F); diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index db580fb..f80e316 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -57,7 +57,7 @@ STATISTIC(NumSTRD2STR, "Number of strd instructions turned back into str's"); namespace { struct ARMLoadStoreOpt : public MachineFunctionPass { static char ID; - ARMLoadStoreOpt() : MachineFunctionPass(ID) {} + ARMLoadStoreOpt() : MachineFunctionPass(&ID) {} const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; @@ -1268,7 +1268,7 @@ bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) { namespace { struct ARMPreAllocLoadStoreOpt : public MachineFunctionPass{ static char ID; - ARMPreAllocLoadStoreOpt() : MachineFunctionPass(ID) {} + ARMPreAllocLoadStoreOpt() : MachineFunctionPass(&ID) {} const TargetData *TD; const TargetInstrInfo *TII; diff --git a/lib/Target/ARM/NEONMoveFix.cpp b/lib/Target/ARM/NEONMoveFix.cpp index 97e54bf..bbdd3c7 100644 --- a/lib/Target/ARM/NEONMoveFix.cpp +++ b/lib/Target/ARM/NEONMoveFix.cpp @@ -24,7 +24,7 @@ STATISTIC(NumVMovs, "Number of reg-reg moves converted"); namespace { struct NEONMoveFixPass : public MachineFunctionPass { static char ID; - NEONMoveFixPass() : MachineFunctionPass(ID) {} + NEONMoveFixPass() : MachineFunctionPass(&ID) {} virtual bool runOnMachineFunction(MachineFunction &Fn); diff --git a/lib/Target/ARM/NEONPreAllocPass.cpp b/lib/Target/ARM/NEONPreAllocPass.cpp index 006a25f..f67717c 100644 --- a/lib/Target/ARM/NEONPreAllocPass.cpp +++ b/lib/Target/ARM/NEONPreAllocPass.cpp @@ -23,7 +23,7 @@ namespace { public: static char ID; - NEONPreAllocPass() : MachineFunctionPass(ID) {} + NEONPreAllocPass() : MachineFunctionPass(&ID) {} virtual bool runOnMachineFunction(MachineFunction &MF); diff --git a/lib/Target/ARM/Thumb2ITBlockPass.cpp b/lib/Target/ARM/Thumb2ITBlockPass.cpp index 45e6937..445b6a3 100644 --- a/lib/Target/ARM/Thumb2ITBlockPass.cpp +++ b/lib/Target/ARM/Thumb2ITBlockPass.cpp @@ -27,7 +27,7 @@ namespace { public: static char ID; - Thumb2ITBlockPass() : MachineFunctionPass(ID) {} + Thumb2ITBlockPass() : MachineFunctionPass(&ID) {} const Thumb2InstrInfo *TII; const TargetRegisterInfo *TRI; diff --git a/lib/Target/ARM/Thumb2SizeReduction.cpp b/lib/Target/ARM/Thumb2SizeReduction.cpp index 1451c53..ba392f3 100644 --- a/lib/Target/ARM/Thumb2SizeReduction.cpp +++ b/lib/Target/ARM/Thumb2SizeReduction.cpp @@ -173,7 +173,7 @@ namespace { char Thumb2SizeReduce::ID = 0; } -Thumb2SizeReduce::Thumb2SizeReduce() : MachineFunctionPass(ID) { +Thumb2SizeReduce::Thumb2SizeReduce() : MachineFunctionPass(&ID) { for (unsigned i = 0, e = array_lengthof(ReduceTable); i != e; ++i) { unsigned FromOpc = ReduceTable[i].WideOpc; if (!ReduceOpcodeMap.insert(std::make_pair(FromOpc, i)).second) diff --git a/lib/Target/Alpha/AlphaBranchSelector.cpp b/lib/Target/Alpha/AlphaBranchSelector.cpp index 3768117..001656e 100644 --- a/lib/Target/Alpha/AlphaBranchSelector.cpp +++ b/lib/Target/Alpha/AlphaBranchSelector.cpp @@ -22,7 +22,7 @@ using namespace llvm; namespace { struct AlphaBSel : public MachineFunctionPass { static char ID; - AlphaBSel() : MachineFunctionPass(ID) {} + AlphaBSel() : MachineFunctionPass(&ID) {} virtual bool runOnMachineFunction(MachineFunction &Fn); diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp index 3aec070..a6c6f52 100644 --- a/lib/Target/Alpha/AlphaCodeEmitter.cpp +++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp @@ -34,7 +34,7 @@ namespace { public: static char ID; - AlphaCodeEmitter(JITCodeEmitter &mce) : MachineFunctionPass(ID), + AlphaCodeEmitter(JITCodeEmitter &mce) : MachineFunctionPass(&ID), MCE(mce) {} /// getBinaryCodeForInstr - This function, generated by the diff --git a/lib/Target/Alpha/AlphaLLRP.cpp b/lib/Target/Alpha/AlphaLLRP.cpp index 85fbfd1..34be470 100644 --- a/lib/Target/Alpha/AlphaLLRP.cpp +++ b/lib/Target/Alpha/AlphaLLRP.cpp @@ -39,7 +39,7 @@ namespace { static char ID; AlphaLLRPPass(AlphaTargetMachine &tm) - : MachineFunctionPass(ID), TM(tm) { } + : MachineFunctionPass(&ID), TM(tm) { } virtual const char *getPassName() const { return "Alpha NOP inserter"; diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index 46f584c..3b4d0a6 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -73,7 +73,7 @@ namespace { public: static char ID; CBackendNameAllUsedStructsAndMergeFunctions() - : ModulePass(ID) {} + : ModulePass(&ID) {} void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired<FindUsedTypes>(); } @@ -110,7 +110,7 @@ namespace { public: static char ID; explicit CWriter(formatted_raw_ostream &o) - : FunctionPass(ID), Out(o), IL(0), Mang(0), LI(0), + : FunctionPass(&ID), Out(o), IL(0), Mang(0), LI(0), TheModule(0), TAsm(0), TCtx(0), TD(0), OpaqueCounter(0), NextAnonValueNumber(0) { FPCounter = 0; diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp index 3e21cd1..396b569 100644 --- a/lib/Target/CppBackend/CPPBackend.cpp +++ b/lib/Target/CppBackend/CPPBackend.cpp @@ -104,7 +104,7 @@ namespace { public: static char ID; explicit CppWriter(formatted_raw_ostream &o) : - ModulePass(ID), Out(o), uniqueNum(0), is_inline(false), indent_level(0){} + ModulePass(&ID), Out(o), uniqueNum(0), is_inline(false), indent_level(0){} virtual const char *getPassName() const { return "C++ backend"; } diff --git a/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp b/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp index b551b79..42fea25 100644 --- a/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp +++ b/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp @@ -32,7 +32,7 @@ namespace { static char ID; Filler(TargetMachine &tm) - : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { } + : MachineFunctionPass(&ID), TM(tm), TII(tm.getInstrInfo()) { } virtual const char *getPassName() const { return "MBlaze Delay Slot Filler"; diff --git a/lib/Target/MSIL/MSILWriter.h b/lib/Target/MSIL/MSILWriter.h index 87440e2..92a3abe 100644 --- a/lib/Target/MSIL/MSILWriter.h +++ b/lib/Target/MSIL/MSILWriter.h @@ -40,7 +40,7 @@ namespace llvm { static char ID; MSILModule(const std::set<const Type *>*& _UsedTypes, const TargetData*& _TD) - : ModulePass(ID), UsedTypes(_UsedTypes), TD(_TD) {} + : ModulePass(&ID), UsedTypes(_UsedTypes), TD(_TD) {} void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired<FindUsedTypes>(); @@ -86,7 +86,7 @@ namespace llvm { DenseMap<const Value*, unsigned> AnonValueNumbers; unsigned NextAnonValueNumber; - MSILWriter(formatted_raw_ostream &o) : FunctionPass(ID), Out(o), + MSILWriter(formatted_raw_ostream &o) : FunctionPass(&ID), Out(o), NextAnonValueNumber(0) { UniqID = 0; } diff --git a/lib/Target/MSP430/MSP430BranchSelector.cpp b/lib/Target/MSP430/MSP430BranchSelector.cpp index b1d6966..529fd93 100644 --- a/lib/Target/MSP430/MSP430BranchSelector.cpp +++ b/lib/Target/MSP430/MSP430BranchSelector.cpp @@ -30,7 +30,7 @@ STATISTIC(NumExpanded, "Number of branches expanded to long format"); namespace { struct MSP430BSel : public MachineFunctionPass { static char ID; - MSP430BSel() : MachineFunctionPass(ID) {} + MSP430BSel() : MachineFunctionPass(&ID) {} /// BlockSizes - The sizes of the basic blocks in the function. std::vector<unsigned> BlockSizes; diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp index 597ea0d..a2b615d 100644 --- a/lib/Target/Mips/MipsDelaySlotFiller.cpp +++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp @@ -32,7 +32,7 @@ namespace { static char ID; Filler(TargetMachine &tm) - : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { } + : MachineFunctionPass(&ID), TM(tm), TII(tm.getInstrInfo()) { } virtual const char *getPassName() const { return "Mips Delay Slot Filler"; diff --git a/lib/Target/PIC16/PIC16MemSelOpt.cpp b/lib/Target/PIC16/PIC16MemSelOpt.cpp index b6aa38f..241170b 100644 --- a/lib/Target/PIC16/PIC16MemSelOpt.cpp +++ b/lib/Target/PIC16/PIC16MemSelOpt.cpp @@ -38,7 +38,7 @@ using namespace llvm; namespace { struct MemSelOpt : public MachineFunctionPass { static char ID; - MemSelOpt() : MachineFunctionPass(ID) {} + MemSelOpt() : MachineFunctionPass(&ID) {} virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreservedID(MachineLoopInfoID); diff --git a/lib/Target/PIC16/PIC16Passes/PIC16Cloner.h b/lib/Target/PIC16/PIC16Passes/PIC16Cloner.h index e7d67ce..e8b5aa4 100644 --- a/lib/Target/PIC16/PIC16Passes/PIC16Cloner.h +++ b/lib/Target/PIC16/PIC16Passes/PIC16Cloner.h @@ -35,7 +35,7 @@ namespace llvm { class PIC16Cloner : public ModulePass { public: static char ID; // Class identification - PIC16Cloner() : ModulePass(ID) {} + PIC16Cloner() : ModulePass(&ID) {} virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired<CallGraph>(); diff --git a/lib/Target/PIC16/PIC16Passes/PIC16Overlay.h b/lib/Target/PIC16/PIC16Passes/PIC16Overlay.h index 2f611e6..5a2551f 100644 --- a/lib/Target/PIC16/PIC16Passes/PIC16Overlay.h +++ b/lib/Target/PIC16/PIC16Passes/PIC16Overlay.h @@ -39,7 +39,7 @@ namespace llvm { unsigned IndirectCallColor; public: static char ID; // Class identification - PIC16Overlay() : ModulePass(ID) { + PIC16Overlay() : ModulePass(&ID) { OverlayStr = "Overlay="; InterruptDepth = PIC16OVERLAY::StartInterruptColor; IndirectCallColor = PIC16OVERLAY::StartIndirectCallColor; diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp index df24e96..8c427a1 100644 --- a/lib/Target/PowerPC/PPCBranchSelector.cpp +++ b/lib/Target/PowerPC/PPCBranchSelector.cpp @@ -31,7 +31,7 @@ STATISTIC(NumExpanded, "Number of branches expanded to long format"); namespace { struct PPCBSel : public MachineFunctionPass { static char ID; - PPCBSel() : MachineFunctionPass(ID) {} + PPCBSel() : MachineFunctionPass(&ID) {} /// BlockSizes - The sizes of the basic blocks in the function. std::vector<unsigned> BlockSizes; diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp index df9ab52..d03cf05 100644 --- a/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -45,7 +45,7 @@ namespace { public: PPCCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce) - : MachineFunctionPass(ID), TM(tm), MCE(mce) {} + : MachineFunctionPass(&ID), TM(tm), MCE(mce) {} /// getBinaryCodeForInstr - This function, generated by the /// CodeEmitterGenerator using TableGen, produces the binary encoding for diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp index aae5da8..9e148ad 100644 --- a/lib/Target/Sparc/DelaySlotFiller.cpp +++ b/lib/Target/Sparc/DelaySlotFiller.cpp @@ -32,7 +32,7 @@ namespace { static char ID; Filler(TargetMachine &tm) - : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { } + : MachineFunctionPass(&ID), TM(tm), TII(tm.getInstrInfo()) { } virtual const char *getPassName() const { return "SPARC Delay Slot Filler"; diff --git a/lib/Target/Sparc/FPMover.cpp b/lib/Target/Sparc/FPMover.cpp index 1423b1e..88b0927 100644 --- a/lib/Target/Sparc/FPMover.cpp +++ b/lib/Target/Sparc/FPMover.cpp @@ -36,7 +36,7 @@ namespace { static char ID; explicit FPMover(TargetMachine &tm) - : MachineFunctionPass(ID), TM(tm) { } + : MachineFunctionPass(&ID), TM(tm) { } virtual const char *getPassName() const { return "Sparc Double-FP Move Fixer"; diff --git a/lib/Target/TargetData.cpp b/lib/Target/TargetData.cpp index 406d288..65f514c 100644 --- a/lib/Target/TargetData.cpp +++ b/lib/Target/TargetData.cpp @@ -226,13 +226,13 @@ void TargetData::init(StringRef Desc) { /// /// @note This has to exist, because this is a pass, but it should never be /// used. -TargetData::TargetData() : ImmutablePass(ID) { +TargetData::TargetData() : ImmutablePass(&ID) { report_fatal_error("Bad TargetData ctor used. " "Tool did not specify a TargetData to use?"); } TargetData::TargetData(const Module *M) - : ImmutablePass(ID) { + : ImmutablePass(&ID) { init(M->getDataLayout()); } diff --git a/lib/Target/X86/SSEDomainFix.cpp b/lib/Target/X86/SSEDomainFix.cpp index 13680c5..dab070e 100644 --- a/lib/Target/X86/SSEDomainFix.cpp +++ b/lib/Target/X86/SSEDomainFix.cpp @@ -115,7 +115,7 @@ class SSEDomainFixPass : public MachineFunctionPass { unsigned Distance; public: - SSEDomainFixPass() : MachineFunctionPass(ID) {} + SSEDomainFixPass() : MachineFunctionPass(&ID) {} virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesAll(); diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index ef2255d..4fd034e 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -53,12 +53,12 @@ namespace { public: static char ID; explicit Emitter(X86TargetMachine &tm, CodeEmitter &mce) - : MachineFunctionPass(ID), II(0), TD(0), TM(tm), + : MachineFunctionPass(&ID), II(0), TD(0), TM(tm), MCE(mce), PICBaseOffset(0), Is64BitMode(false), IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} Emitter(X86TargetMachine &tm, CodeEmitter &mce, const X86InstrInfo &ii, const TargetData &td, bool is64) - : MachineFunctionPass(ID), II(&ii), TD(&td), TM(tm), + : MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm), MCE(mce), PICBaseOffset(0), Is64BitMode(is64), IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp index cd23a7d..a58c590 100644 --- a/lib/Target/X86/X86FloatingPoint.cpp +++ b/lib/Target/X86/X86FloatingPoint.cpp @@ -50,7 +50,7 @@ STATISTIC(NumFP , "Number of floating point instructions"); namespace { struct FPS : public MachineFunctionPass { static char ID; - FPS() : MachineFunctionPass(ID) { + FPS() : MachineFunctionPass(&ID) { // This is really only to keep valgrind quiet. // The logic in isLive() is too much for it. memset(Stack, 0, sizeof(Stack)); diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 4ee0c0a..98323fa 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -3029,7 +3029,7 @@ namespace { /// global base register for x86-32. struct CGBR : public MachineFunctionPass { static char ID; - CGBR() : MachineFunctionPass(ID) {} + CGBR() : MachineFunctionPass(&ID) {} virtual bool runOnMachineFunction(MachineFunction &MF) { const X86TargetMachine *TM = diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 746e3fa..afb0740 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -1557,7 +1557,7 @@ unsigned getX86SubSuperRegister(unsigned Reg, EVT VT, bool High) { namespace { struct MSAH : public MachineFunctionPass { static char ID; - MSAH() : MachineFunctionPass(ID) {} + MSAH() : MachineFunctionPass(&ID) {} virtual bool runOnMachineFunction(MachineFunction &MF) { const X86TargetMachine *TM = |