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author | Evan Cheng <evan.cheng@apple.com> | 2006-12-01 21:52:41 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2006-12-01 21:52:41 +0000 |
commit | 258ff6726d6c079ec6c5b13e340299cbf7300299 (patch) | |
tree | 46d0d3f571dcf7ee0a6cfb8a10b84c627e080f57 /lib/Target | |
parent | f2d5532c668e82d5066badbf93bbb56ac435bb5d (diff) | |
download | external_llvm-258ff6726d6c079ec6c5b13e340299cbf7300299.zip external_llvm-258ff6726d6c079ec6c5b13e340299cbf7300299.tar.gz external_llvm-258ff6726d6c079ec6c5b13e340299cbf7300299.tar.bz2 |
convertToThreeAddress() is now responsible for updating live info as well as inserting the new MI's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32097 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index a7ccac6..452eb1f 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -18,6 +18,7 @@ #include "X86Subtarget.h" #include "X86TargetMachine.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/LiveVariables.h" using namespace llvm; X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) @@ -123,12 +124,20 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI, /// This method returns a null pointer if the transformation cannot be /// performed, otherwise it returns the new instruction. /// -MachineInstr *X86InstrInfo::convertToThreeAddress(MachineInstr *MI) const { +MachineInstr * +X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, + MachineBasicBlock::iterator &MBBI, + LiveVariables &LV) const { + MachineInstr *MI = MBBI; // All instructions input are two-addr instructions. Get the known operands. unsigned Dest = MI->getOperand(0).getReg(); unsigned Src = MI->getOperand(1).getReg(); MachineInstr *NewMI = NULL; + // FIXME: 16-bit LEA's are really slow on Athlons, but not bad on P4's. When + // we have subtarget support, enable the 16-bit LEA generation here. + bool DisableLEA16 = true; + switch (MI->getOpcode()) { default: break; case X86::SHUFPSrri: { @@ -140,8 +149,7 @@ MachineInstr *X86InstrInfo::convertToThreeAddress(MachineInstr *MI) const { unsigned M = MI->getOperand(3).getImmedValue(); if (!Subtarget->hasSSE2() || B != C) return 0; NewMI = BuildMI(get(X86::PSHUFDri), A).addReg(B).addImm(M); - NewMI->copyKillDeadInfo(MI); - return NewMI; + goto Done; } } @@ -150,10 +158,6 @@ MachineInstr *X86InstrInfo::convertToThreeAddress(MachineInstr *MI) const { // add and inc do. :( return 0; - // FIXME: 16-bit LEA's are really slow on Athlons, but not bad on P4's. When - // we have subtarget support, enable the 16-bit LEA generation here. - bool DisableLEA16 = true; - switch (MI->getOpcode()) { case X86::INC32r: case X86::INC64_32r: @@ -219,8 +223,12 @@ MachineInstr *X86InstrInfo::convertToThreeAddress(MachineInstr *MI) const { break; } - if (NewMI) +Done: + if (NewMI) { NewMI->copyKillDeadInfo(MI); + LV.instructionChanged(MI, NewMI); // Update live variables + MFI->insert(MBBI, NewMI); // Insert the new inst + } return NewMI; } |