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author | Bob Wilson <bob.wilson@apple.com> | 2010-08-26 00:13:36 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2010-08-26 00:13:36 +0000 |
commit | 2ac124c561c6c6687ce0a4f7709586010b6c80c4 (patch) | |
tree | aba36dd135c12ba0c80141ecd15c41b7fa8f8b8d /lib/Target | |
parent | c87a6d4fb088a28b71c3718ae6af78fef3f1d0bf (diff) | |
download | external_llvm-2ac124c561c6c6687ce0a4f7709586010b6c80c4.zip external_llvm-2ac124c561c6c6687ce0a4f7709586010b6c80c4.tar.gz external_llvm-2ac124c561c6c6687ce0a4f7709586010b6c80c4.tar.bz2 |
Revert svn 107892 (with changes to work with trunk). It caused a crash if
a VLD result was not used (Radar 8355607). It should also fix pr7988, but
I haven't verified that yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112118 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/ARM/NEONPreAllocPass.cpp | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/lib/Target/ARM/NEONPreAllocPass.cpp b/lib/Target/ARM/NEONPreAllocPass.cpp index 0ba11c8..0c1cfae 100644 --- a/lib/Target/ARM/NEONPreAllocPass.cpp +++ b/lib/Target/ARM/NEONPreAllocPass.cpp @@ -447,7 +447,34 @@ bool NEONPreAllocPass::PreAllocNEONRegisters(MachineBasicBlock &MBB) { continue; if (FormsRegSequence(MI, FirstOpnd, NumRegs, Offset, Stride)) continue; - llvm_unreachable("expected a REG_SEQUENCE"); + + MachineBasicBlock::iterator NextI = llvm::next(MBBI); + for (unsigned R = 0; R < NumRegs; ++R) { + MachineOperand &MO = MI->getOperand(FirstOpnd + R); + assert(MO.isReg() && MO.getSubReg() == 0 && "unexpected operand"); + unsigned VirtReg = MO.getReg(); + assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && + "expected a virtual register"); + + // For now, just assign a fixed set of adjacent registers. + // This leaves plenty of room for future improvements. + static const unsigned NEONDRegs[] = { + ARM::D0, ARM::D1, ARM::D2, ARM::D3, + ARM::D4, ARM::D5, ARM::D6, ARM::D7 + }; + MO.setReg(NEONDRegs[Offset + R * Stride]); + + if (MO.isUse()) { + // Insert a copy from VirtReg. + BuildMI(MBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),MO.getReg()) + .addReg(VirtReg, getKillRegState(MO.isKill())); + MO.setIsKill(); + } else if (MO.isDef() && !MO.isDead()) { + // Add a copy to VirtReg. + BuildMI(MBB, NextI, DebugLoc(), TII->get(TargetOpcode::COPY), VirtReg) + .addReg(MO.getReg()); + } + } } return Modified; |