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| author | Dale Johannesen <dalej@apple.com> | 2009-10-07 22:47:20 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2009-10-07 22:47:20 +0000 |
| commit | 5f3663e51d1767ebb174d67632dbeca259b6c093 (patch) | |
| tree | c52ac87e369a3e04199ac7626960aff189fc6505 /lib/Target | |
| parent | b2cae81ac480b0332c089ad44e27537325dc79a5 (diff) | |
| download | external_llvm-5f3663e51d1767ebb174d67632dbeca259b6c093.zip external_llvm-5f3663e51d1767ebb174d67632dbeca259b6c093.tar.gz external_llvm-5f3663e51d1767ebb174d67632dbeca259b6c093.tar.bz2 | |
Fix handling of x86 'R' constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83499 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index de44adf..fb5399e 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -9397,7 +9397,6 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, switch (Constraint[0]) { default: break; case 'r': // GENERAL_REGS - case 'R': // LEGACY_REGS case 'l': // INDEX_REGS if (VT == MVT::i8) return std::make_pair(0U, X86::GR8RegisterClass); @@ -9406,6 +9405,14 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, if (VT == MVT::i32 || !Subtarget->is64Bit()) return std::make_pair(0U, X86::GR32RegisterClass); return std::make_pair(0U, X86::GR64RegisterClass); + case 'R': // LEGACY_REGS + if (VT == MVT::i8) + return std::make_pair(0U, X86::GR8_NOREXRegisterClass); + if (VT == MVT::i16) + return std::make_pair(0U, X86::GR16_NOREXRegisterClass); + if (VT == MVT::i32 || !Subtarget->is64Bit()) + return std::make_pair(0U, X86::GR32_NOREXRegisterClass); + return std::make_pair(0U, X86::GR64_NOREXRegisterClass); case 'f': // FP Stack registers. // If SSE is enabled for this VT, use f80 to ensure the isel moves the // value to the correct fpstack register class. |