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author | Chris Lattner <sabre@nondot.org> | 2004-04-07 05:04:01 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2004-04-07 05:04:01 +0000 |
commit | 6179047661ae9d2291ef58147934a2630591b126 (patch) | |
tree | 859569b693ebab8dc246abe60d75b16ae84a014d /lib/Target | |
parent | 0d538bbec2ebf84d615f3a3188c5f3b708646fb2 (diff) | |
download | external_llvm-6179047661ae9d2291ef58147934a2630591b126.zip external_llvm-6179047661ae9d2291ef58147934a2630591b126.tar.gz external_llvm-6179047661ae9d2291ef58147934a2630591b126.tar.bz2 |
andd subcc instructions which is used to create the 'cmp' pseudo instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12744 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 4 | ||||
-rw-r--r-- | lib/Target/SparcV8/SparcV8InstrInfo.td | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 8764d4e..ee397c8 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -94,7 +94,8 @@ def SRAri : F3_2<2, 0b100111, "sra">; def ADDrr : F3_1<2, 0b000000, "add">; // Section B.15 - Subtract Instructions, p. 110 -def SUBrr : F3_1<2, 0b000100, "sub">; +def SUBrr : F3_1<2, 0b000100, "sub">; +def SUBCCrr : F3_1<2, 0b010100, "subcc">; // Section B.18 - Multiply Instructions, p. 113 def UMULrr : F3_1<2, 0b001010, "umul">; @@ -133,3 +134,4 @@ def JMPLri : F3_2<2, 0b111000, "jmpl">; // jmpl [rs1+imm], rd // Section B.29 - Write State Register Instructions def WRrr : F3_1<2, 0b110000, "wr">; // wr rs1, rs2, rd def WRri : F3_2<2, 0b110000, "wr">; // wr rs1, imm, rd + diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td index 8764d4e..ee397c8 100644 --- a/lib/Target/SparcV8/SparcV8InstrInfo.td +++ b/lib/Target/SparcV8/SparcV8InstrInfo.td @@ -94,7 +94,8 @@ def SRAri : F3_2<2, 0b100111, "sra">; def ADDrr : F3_1<2, 0b000000, "add">; // Section B.15 - Subtract Instructions, p. 110 -def SUBrr : F3_1<2, 0b000100, "sub">; +def SUBrr : F3_1<2, 0b000100, "sub">; +def SUBCCrr : F3_1<2, 0b010100, "subcc">; // Section B.18 - Multiply Instructions, p. 113 def UMULrr : F3_1<2, 0b001010, "umul">; @@ -133,3 +134,4 @@ def JMPLri : F3_2<2, 0b111000, "jmpl">; // jmpl [rs1+imm], rd // Section B.29 - Write State Register Instructions def WRrr : F3_1<2, 0b110000, "wr">; // wr rs1, rs2, rd def WRri : F3_2<2, 0b110000, "wr">; // wr rs1, imm, rd + |