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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-05-19 21:47:13 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-05-19 21:47:13 +0000 |
| commit | 634123e98de9c87aa1275a5ccc6b69be97d0ca71 (patch) | |
| tree | 2cff598215782dbb6d995559c083f2a70ebdbac2 /lib/Target | |
| parent | 60abcb786e8ff401e7d925d717e725d4a3d925b5 (diff) | |
| download | external_llvm-634123e98de9c87aa1275a5ccc6b69be97d0ca71.zip external_llvm-634123e98de9c87aa1275a5ccc6b69be97d0ca71.tar.gz external_llvm-634123e98de9c87aa1275a5ccc6b69be97d0ca71.tar.bz2 | |
Don't use %g0 to materialize 0 directly.
The wired physreg doesn't work on tied operands like on MOVXCC.
Add a README note to fix this later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182225 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/Sparc/README.txt | 2 | ||||
| -rw-r--r-- | lib/Target/Sparc/SparcInstr64Bit.td | 4 |
2 files changed, 2 insertions, 4 deletions
diff --git a/lib/Target/Sparc/README.txt b/lib/Target/Sparc/README.txt index b4991fe..c831367 100644 --- a/lib/Target/Sparc/README.txt +++ b/lib/Target/Sparc/README.txt @@ -57,3 +57,5 @@ int %t1(int %a, int %b) { * Fill delay slots * Implement JIT support + +* Use %g0 directly to materialize 0. No instruction is required. diff --git a/lib/Target/Sparc/SparcInstr64Bit.td b/lib/Target/Sparc/SparcInstr64Bit.td index 3af494e..daafb43 100644 --- a/lib/Target/Sparc/SparcInstr64Bit.td +++ b/lib/Target/Sparc/SparcInstr64Bit.td @@ -59,10 +59,6 @@ defm SRAX : F3_S<"srax", 0b100111, 1, sra, i64, I64Regs>; // preferable to use a constant pool load instead, depending on the // microarchitecture. -// The %g0 register is constant 0. -// This is useful for stx %g0, [...], for example. -def : Pat<(i64 0), (i64 G0)>, Requires<[Is64Bit]>; - // Single-instruction patterns. // The ALU instructions want their simm13 operands as i32 immediates. |