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authorChris Lattner <sabre@nondot.org>2006-02-02 20:16:12 +0000
committerChris Lattner <sabre@nondot.org>2006-02-02 20:16:12 +0000
commit6524287c53cf727a8ef33517403fcb1bbd7adff9 (patch)
treeca6c015446c3719738d1b19f92b98c7af11f449a /lib/Target
parent408396014742a05cad1c91949d2226169e3f9d80 (diff)
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implement isStoreToStackSlot for PPC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25914 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/PowerPC/PPCInstrInfo.cpp19
-rw-r--r--lib/Target/PowerPC/PPCInstrInfo.h1
2 files changed, 19 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index 322d027..66251c0 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -95,8 +95,25 @@ unsigned PPCInstrInfo::isLoadFromStackSlot(MachineInstr *MI,
break;
}
return 0;
- }
+}
+unsigned PPCInstrInfo::isStoreToStackSlot(MachineInstr *MI,
+ int &FrameIndex) const {
+ switch (MI->getOpcode()) {
+ default: break;
+ //case PPC::ST: ?
+ case PPC::STW:
+ case PPC::STFS:
+ case PPC::STFD:
+ if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImmedValue() &&
+ MI->getOperand(2).isFrameIndex()) {
+ FrameIndex = MI->getOperand(2).getFrameIndex();
+ return MI->getOperand(0).getReg();
+ }
+ break;
+ }
+ return 0;
+}
// commuteInstruction - We can commute rlwimi instructions, but only if the
// rotate amt is zero. We also have to munge the immediates a bit.
diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h
index d0be2d6..f046e5d 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/lib/Target/PowerPC/PPCInstrInfo.h
@@ -40,6 +40,7 @@ public:
unsigned& destReg) const;
unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
+ unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
// commuteInstruction - We can commute rlwimi instructions, but only if the
// rotate amt is zero. We also have to munge the immediates a bit.