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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-08-21 12:40:21 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-08-21 12:40:21 +0000 |
| commit | 6c28c006c732c46bef1f367edeeb992051307e2b (patch) | |
| tree | 81c020fe1e874695b18b4abf8b91d47615961d38 /lib/Target | |
| parent | 2a0296f324bd6d4c342bbb525793add75da96cea (diff) | |
| download | external_llvm-6c28c006c732c46bef1f367edeeb992051307e2b.zip external_llvm-6c28c006c732c46bef1f367edeeb992051307e2b.tar.gz external_llvm-6c28c006c732c46bef1f367edeeb992051307e2b.tar.bz2 | |
Provide vext.{16,32}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79620 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 33 |
2 files changed, 23 insertions, 13 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 9eb3cc9..3ceedd7 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -2371,9 +2371,6 @@ static bool isVEXTMask(const SmallVectorImpl<int> &M, EVT VT, if (ReverseVEXT) Imm -= NumElts; - // VEXT only handles 8-bit elements so scale the index for larger elements. - Imm *= VT.getVectorElementType().getSizeInBits() / 8; - return true; } diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 9cd9657..00e6c8a 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -1949,16 +1949,29 @@ def VREV16q8 : VREV16Q<0b00, "vrev16.8", v16i8>; // VEXT : Vector Extract -def VEXTd : N3V<0,1,0b11,0b0000,0,0, (outs DPR:$dst), - (ins DPR:$lhs, DPR:$rhs, i32imm:$index), NoItinerary, - "vext.8\t$dst, $lhs, $rhs, $index", "", - [(set DPR:$dst, (v8i8 (NEONvext (v8i8 DPR:$lhs), - (v8i8 DPR:$rhs), imm:$index)))]>; -def VEXTq : N3V<0,1,0b11,0b0000,1,0, (outs QPR:$dst), - (ins QPR:$lhs, QPR:$rhs, i32imm:$index), NoItinerary, - "vext.8\t$dst, $lhs, $rhs, $index", "", - [(set QPR:$dst, (v16i8 (NEONvext (v16i8 QPR:$lhs), - (v16i8 QPR:$rhs), imm:$index)))]>; +class VEXTd<string OpcodeStr, ValueType Ty> + : N3V<0,1,0b11,0b0000,0,0, (outs DPR:$dst), + (ins DPR:$lhs, DPR:$rhs, i32imm:$index), NoItinerary, + !strconcat(OpcodeStr, "\t$dst, $lhs, $rhs, $index"), "", + [(set DPR:$dst, (Ty (NEONvext (Ty DPR:$lhs), + (Ty DPR:$rhs), imm:$index)))]>; + +class VEXTq<string OpcodeStr, ValueType Ty> + : N3V<0,1,0b11,0b0000,1,0, (outs QPR:$dst), + (ins QPR:$lhs, QPR:$rhs, i32imm:$index), NoItinerary, + !strconcat(OpcodeStr, "\t$dst, $lhs, $rhs, $index"), "", + [(set QPR:$dst, (Ty (NEONvext (Ty QPR:$lhs), + (Ty QPR:$rhs), imm:$index)))]>; + +def VEXTd8 : VEXTd<"vext.8", v8i8>; +def VEXTd16 : VEXTd<"vext.16", v4i16>; +def VEXTd32 : VEXTd<"vext.32", v2i32>; +def VEXTdf : VEXTd<"vext.32", v2f32>; + +def VEXTq8 : VEXTq<"vext.8", v16i8>; +def VEXTq16 : VEXTq<"vext.16", v8i16>; +def VEXTq32 : VEXTq<"vext.32", v4i32>; +def VEXTqf : VEXTq<"vext.32", v4f32>; // VTRN : Vector Transpose |