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| author | Niels Ole Salscheider <niels_ole@salscheider-online.de> | 2013-08-08 16:06:08 +0000 |
|---|---|---|
| committer | Niels Ole Salscheider <niels_ole@salscheider-online.de> | 2013-08-08 16:06:08 +0000 |
| commit | 7114e2e7cff35364230795123d9049b96098725e (patch) | |
| tree | 28260c27461f2df929fcedddd053d2eebaed4c48 /lib/Target | |
| parent | 91955e78e718b4a7d2272ce476e29774f6ac84ea (diff) | |
| download | external_llvm-7114e2e7cff35364230795123d9049b96098725e.zip external_llvm-7114e2e7cff35364230795123d9049b96098725e.tar.gz external_llvm-7114e2e7cff35364230795123d9049b96098725e.tar.bz2 | |
R600/SI: Implement sint<->fp64 conversions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187987 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/R600/SIInstrInfo.td | 6 | ||||
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 8 |
2 files changed, 12 insertions, 2 deletions
diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td index 52af79c..302fa24 100644 --- a/lib/Target/R600/SIInstrInfo.td +++ b/lib/Target/R600/SIInstrInfo.td @@ -184,6 +184,12 @@ multiclass VOP1_32 <bits<8> op, string opName, list<dag> pattern> multiclass VOP1_64 <bits<8> op, string opName, list<dag> pattern> : VOP1_Helper <op, VReg_64, VSrc_64, opName, pattern>; +multiclass VOP1_32_64 <bits<8> op, string opName, list<dag> pattern> + : VOP1_Helper <op, VReg_32, VSrc_64, opName, pattern>; + +multiclass VOP1_64_32 <bits<8> op, string opName, list<dag> pattern> + : VOP1_Helper <op, VReg_64, VSrc_32, opName, pattern>; + multiclass VOP2_Helper <bits<6> op, RegisterClass vrc, RegisterClass arc, string opName, list<dag> pattern, string revOp> { def _e32 : VOP2 < diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index 500d15e..efe7a3e 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -603,8 +603,12 @@ defm V_MOV_B32 : VOP1_32 <0x00000001, "V_MOV_B32", []>; } // End neverHasSideEffects = 1, isMoveImm = 1 defm V_READFIRSTLANE_B32 : VOP1_32 <0x00000002, "V_READFIRSTLANE_B32", []>; -//defm V_CVT_I32_F64 : VOP1_32 <0x00000003, "V_CVT_I32_F64", []>; -//defm V_CVT_F64_I32 : VOP1_64 <0x00000004, "V_CVT_F64_I32", []>; +defm V_CVT_I32_F64 : VOP1_32_64 <0x00000003, "V_CVT_I32_F64", + [(set i32:$dst, (fp_to_sint f64:$src0))] +>; +defm V_CVT_F64_I32 : VOP1_64_32 <0x00000004, "V_CVT_F64_I32", + [(set f64:$dst, (sint_to_fp i32:$src0))] +>; defm V_CVT_F32_I32 : VOP1_32 <0x00000005, "V_CVT_F32_I32", [(set f32:$dst, (sint_to_fp i32:$src0))] >; |